Arbitrarily shaped rectilinear module placement using the transitive closure graph representation

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 10, Issue 6, 2002, Pages 886-901

  Lin, Jai Ming ^a   Chen, Hsin Lung ^b   Chang, Yao Wen ^c  

^a REALTEK SEMICONDUCTOR CORP   (Taiwan)

^b ETRON TECHNOLOGY INC   (Taiwan)

^c NATIONAL TAIWAN UNIVERSITY   (Taiwan)

Author keywords

Floorplanning; Placement; Transitive closure graph

Indexed keywords

ALGORITHMS; CONSTRAINT THEORY; ELECTRIC NETWORK TOPOLOGY; GRAPH THEORY; SIMULATED ANNEALING;

TRANSITIVE CLOSURE GRAPHS (TCG);

MICROPROCESSOR CHIPS;

EID: 0037002429     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2002.808431     Document Type: Article

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