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Volumn 716, Issue , 2002, Pages 3-8

Suppression of parasitic BJT action in single pocket thin film deep sub-micron SOI MOSFETs

Author keywords

[No Author keywords available]

Indexed keywords

BIPOLAR TRANSISTORS; COMPUTER SIMULATION; LEAKAGE CURRENTS; SILICON ON INSULATOR TECHNOLOGY; THIN FILMS;

EID: 0036945638     PISSN: 02729172     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1557/proc-716-b1.1     Document Type: Conference Paper
Times cited : (3)

References (14)
  • 2
    • 0032074892 scopus 로고    scopus 로고
    • Fully depleted SOI CMOS for analog applications
    • May
    • J. P. Colinge, "Fully Depleted SOI CMOS for Analog Applications," IEEE Trans. Electron Devices, vol. 45, pp. 1010-1016, May 1998.
    • (1998) IEEE Trans. Electron Devices , vol.45 , pp. 1010-1016
    • Colinge, J.P.1
  • 3
    • 0026172212 scopus 로고
    • Analysis and control of floating-body bipolar effects in fully depleted submicrometer SOI MOSFETs
    • June
    • Jin-Young Choi, and Jerry G. Fossum, "Analysis and Control of Floating-Body Bipolar Effects in Fully Depleted Submicrometer SOI MOSFETs", IEEE Trans. Electron Devices, vol. 38, pp. 1384-1391, June 1991.
    • (1991) IEEE Trans. Electron Devices , vol.38 , pp. 1384-1391
    • Choi, J.-Y.1    Fossum, J.G.2
  • 5
    • 0023999599 scopus 로고
    • Avalanche-induced drain-source breakdown in silicon-on-insulator n-MOSFET's
    • Apr.
    • K.K. Young and J.A. Burns, "Avalanche-induced drain-source breakdown in silicon-on-insulator n-MOSFET's," IEEE Trans. Electron Devices, vol. 35, pp.426-431, Apr. 1988.
    • (1988) IEEE Trans. Electron Devices , vol.35 , pp. 426-431
    • Young, K.K.1    Burns, J.A.2
  • 9
    • 0033169526 scopus 로고    scopus 로고
    • An asymmetrically doped buried-layer (ADB) structure for low-voltage mixed analog-digital CMOS LSI's
    • M. Miyamoto, K. Toyota, K. Seki, and T. Nagano, "An asymmetrically doped buried-layer (ADB) structure for low-voltage mixed analog-digital CMOS LSI's," IEEE Trans. Electron Devices, vol. 46, pp. 1699-1704, 1999.
    • (1999) IEEE Trans. Electron Devices , vol.46 , pp. 1699-1704
    • Miyamoto, M.1    Toyota, K.2    Seki, K.3    Nagano, T.4
  • 12
    • 0023542548 scopus 로고
    • The impact of gate-induced-drain-leakage on MOSFET scaling
    • T. Y. Chan, J. Chen, P. K. Ko, and C. Hu, "The impact of gate-induced-drain-leakage on MOSFET scaling", IEEE IEDM Technical Digest, pp. 718-721, 1987.
    • (1987) IEEE IEDM Technical Digest , pp. 718-721
    • Chan, T.Y.1    Chen, J.2    Ko, P.K.3    Hu, C.4
  • 13
    • 0026954430 scopus 로고
    • The enhancement of gate-induced-drain-leakage current in short-channel SOI MOSFET and its application in measuring lateral bipolar current gain β
    • J. Chen, F. Assaderaghi, P.-K. Ko, and C. Hu, "The enhancement of Gate-Induced-Drain-Leakage current in short-channel SOI MOSFET and its application in measuring lateral bipolar current gain β", IEEE Electron Device Lett., vol. 13, pp. 572-574, 1992.
    • (1992) IEEE Electron Device Lett. , vol.13 , pp. 572-574
    • Chen, J.1    Assaderaghi, F.2    Ko, P.-K.3    Hu, C.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.