A 27-MHz/54-MHz 11-mW MPEG-4 video decoder LSI for mobile applications

IEEE Journal of Solid-State Circuits

Volumn 37, Issue 11, 2002, Pages 1574-1581

  Hashimoto, Takashi ^a   Ohashi, Masahiro ^a   Matsuo, Masatoshi ^a   Kuromaru, Shun Ichi ^a   Mori iwa, Toshihiro ^a   Hamada, Mana ^a   Sugisawa, Yuji ^a   Tomita, Hiroto ^a   Hoshino, Masashi ^a   Nakamura, Tsuyoshi ^a   Ishida, Ken Ichi ^a   Watada, Kazuhiro ^a   Fukunaga, Taro ^a   Michiyama, Junji ^a  

^a PANASONIC CORPORATION   (Japan)

Author keywords

Low power; Mobile application; MPEG 4 visual; Multimedia processor; Post video processing

Indexed keywords

CMOS INTEGRATED CIRCUITS; DECODING; DIGITAL SIGNAL PROCESSING; IMAGE COMPRESSION; MICROPROCESSOR CHIPS; MOBILE TELECOMMUNICATION SYSTEMS; OPTIMIZATION; RANDOM ACCESS STORAGE; THRESHOLD VOLTAGE;

CLOCK GATING; MOVING PICTURE EXPERT GROUP; MULTIMEDIA PROCESSOR; POST VIDEO PROCESSING; VECTOR PIPELINE ARCHITECTURE; VIDEO DECODER;

LSI CIRCUITS;

EID: 0036861784     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2002.803932     Document Type: Article

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