A 60-mW MPEG4 video codec using clustered voltage scaling with variable supply-voltage scheme

IEEE Journal of Solid-State Circuits

Volumn 33, Issue 11, 1998, Pages 1772-1778

  Takahashi, Masafumi ^a,c,d   Hamada, Mototsugu ^a,e,f   Nishikawa, Tsuyoshi ^a,e,f   Arakida, Hideho ^a,g   Fujita, Tetsuya ^a,h   Hatori, Fumitoshi ^a,b   Mita, Shinji ^a   Suzuki, Kojiro ^a   Chiba, Akihiko ^a   Terazawa, Toshihiro ^a   Sano, Fumihiko ^a   Watanabe, Yoshinori ^a   Usami, Kimiyoshi ^a   Igarashi, Mutsunori ^a   Ishikawa, Takashi ^a   Kanazawa, Masahiro ^a   Kuroda, Tadahiro ^a,b   Furuyama, Tohru ^a,b  

^a TOSHIBA CORPORATION   (Japan)

^b IEEE

^c UNIVERSITY OF TSUKUBA   (Japan)

^d IPSJ   (Japan)

^e UNIVERSITY OF TOKYO   (Japan)

^f JAPAN SOCIETY OF APPLIED PHYSICS   (Japan)

^g KEIO UNIVERSITY   (Japan)

^h HOSEI UNIVERSITY   (Japan)

Author keywords

Clock gating; CVS; Low power; MPEG4; Pipelining; Video codec; VS; VT CMOS

Indexed keywords

CMOS INTEGRATED CIRCUITS; DECODING; ELECTRIC NETWORK ANALYSIS; ELECTRIC POTENTIAL; ENERGY DISSIPATION; IMAGE CODING; INTEGRATED CIRCUIT LAYOUT; MICROPROCESSOR CHIPS; POWER CONVERTERS; RANDOM ACCESS STORAGE; REDUCED INSTRUCTION SET COMPUTING; STANDARDS;

CLOCK GATING; CLUSTERED VOLTAGE SCALING; MOTION PICTURE EXPERTS GROUP (MPEG) STANDARDS;

VIDEO SIGNAL PROCESSING;

EID: 0032205691     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.726575     Document Type: Article

References (9)

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