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Volumn 46, Issue 11, 2002, Pages 1983-1989

Effects of Si-cap layer thinning and Ge segregation on the characteristics of Si/SiGe/Si heterostructure pMOSFETs

Author keywords

Ge segregation; Interface state density; MOSFET; Si cap layer; Si SiGe Si heterostructure; Transconductance

Indexed keywords

CAPACITANCE; GATES (TRANSISTOR); HETEROJUNCTIONS; INTERFACES (MATERIALS); THRESHOLD VOLTAGE; TRANSCONDUCTANCE;

EID: 0036839255     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0038-1101(02)00139-9     Document Type: Conference Paper
Times cited : (26)

References (9)
  • 3
    • 0030172689 scopus 로고    scopus 로고
    • Deep submicron CMOS based on silicon germanium technology
    • O'Neill A.G., Antoniadis D.A. Deep submicron CMOS based on silicon germanium technology. IEEE Trans Electron Dev. 43:1996;911-918.
    • (1996) IEEE Trans Electron Dev , vol.43 , pp. 911-918
    • O'Neill, A.G.1    Antoniadis, D.A.2
  • 7
    • 0034227226 scopus 로고    scopus 로고
    • Si/SiGe/Si pMOS performance-alloy scattering and other considerations
    • Whall T.E., Parker E.H.C. Si/SiGe/Si pMOS performance-alloy scattering and other considerations. Thin Solid Films. 368:2000;297-305.
    • (2000) Thin Solid Films , vol.368 , pp. 297-305
    • Whall, T.E.1    Parker, E.H.C.2
  • 9
    • 0032687249 scopus 로고    scopus 로고
    • DC and low-frequency noise characteristics of SiGe p-channel FET's designed for 0.13 μm technology
    • Okhonin S., Py M.A., Georgescu B., Fisher H., Risch L. DC and low-frequency noise characteristics of SiGe p-channel FET's designed for 0.13. μ m technology IEEE Trans Electron Dev. 46:1999;1514-1517.
    • (1999) IEEE Trans Electron Dev , vol.46 , pp. 1514-1517
    • Okhonin, S.1    Py, M.A.2    Georgescu, B.3    Fisher, H.4    Risch, L.5


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.