High hole mobilities in fully-strained Si1-xGex layers (0.3 < x < 0.4) and their significance for SiGe pMOSFET performance

IEEE Transactions on Electron Devices

Volumn 48, Issue 8, 2001, Pages 1826-1832

  Lander, Robert J P ^a   Ponomarev, Youri V ^a   Van Berkum, Jurgen G M ^a   De Boer, Wiebe B ^b  

^a PHILIPS RESEARCH LABORATORIES   (Netherlands)

^b NXP SEMICONDUCTORS   (Netherlands)

Author keywords

Charge carrier processes; Device modeling; Hole mobility; MOSFETs; Process modeling; Semiconductor heterojunctions; SiGe alloys; Strained layer heterostructures

Indexed keywords

CARRIER CONCENTRATION; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ELECTRIC CURRENTS; ELECTRIC FIELD EFFECTS; ENERGY GAP; GATES (TRANSISTOR); HETEROJUNCTIONS; HOLE MOBILITY; MOSFET DEVICES; SEMICONDUCTING SILICON COMPOUNDS; SEMICONDUCTOR DEVICE MODELS;

CHARGE DISTRIBUTION; GATE CONTROL; HOLE DENSITIES; HOLE TRANSPORT MEASUREMENTS; SILICON GERMANIUM;

INTEGRATED CIRCUIT LAYOUT;

EID: 0035424156     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.936714     Document Type: Conference Paper

References (22)

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