SCOPUS 정보 검색 플랫폼

Volumn 23, Issue 7, 2002, Pages 407-409

Development of high-performance polycrystalline silicon thin-film transistors (TFTs) using defect control process technologies

(7) Higashi, Seiichiro b Abe, Daisuke b Hiroshima, Yasushi b Miyashita, Kazuyuki b Kawamura, Takahiro b Inoue, Satoshi a,b Shimoda, Tatsuya b

a IEEE

b SEIKO EPSON CORPORATION (Japan)

Author keywords

Chemical vapor deposition (CVD); Electron cyclotron resonance (ECR) plasma; Excimer laser annealing; Oxygen plasma; Poly Si TFT; Trap states

Indexed keywords

ANNEALING; CRYSTAL DEFECTS; ELECTRON CYCLOTRON RESONANCE; ELECTRON MOBILITY; GATES (TRANSISTOR); GRAIN SIZE AND SHAPE; INTERFACES (MATERIALS); LASER APPLICATIONS; PLASMA ENHANCED CHEMICAL VAPOR DEPOSITION; THIN FILM TRANSISTORS; THRESHOLD VOLTAGE; TRANSMISSION ELECTRON MICROSCOPY;

CHANNEL MOBILITY; DEFECT CONTROL PROCESS TECHNOLOGY; EXCIMER LASER ANNEALING; OXYGEN PLASMA; OXYGEN PLASMA TREATMENT; SUBTHRESHOLD SWING;

POLYSILICON;

EID: 0036645904 PISSN: 07413106 EISSN: None Source Type: Journal
DOI: 10.1109/LED.2002.1015218 Document Type: Article

Times cited : (5)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.