메뉴 건너뛰기





Volumn , Issue , 2000, Pages 15-20

On testing the path delay faults of a microprocessor using its instruction set

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMBINATORIAL CIRCUITS; CORRELATION METHODS; ELECTRIC NETWORK ANALYSIS; FLIP FLOP CIRCUITS; INTEGRATED CIRCUIT TESTING;

EID: 0033751144     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article
Times cited : (44)

References (9)
  • Reference 정보가 존재하지 않습니다.

* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.