Integration of asynchronous and self-checking multiple-valued current-mode circuits based on dual-rail differential logic

Proceedings of IEEE Pacific Rim International Symposium on Dependable Computing, PRDC

Volumn 2000-January, Issue , 2000, Pages 27-33

  Hanyu, T ^a   Ike, T ^a   Kameyama, M ^a  

^a TOHOKU UNIVERSITY   (Japan)

Author keywords

Circuit faults; Circuit testing; CMOS logic circuits; CMOS technology; Current mode circuits; Logic circuits; Low voltage; Power dissipation; Rails; Very large scale integration

Indexed keywords

ASYNCHRONOUS SEQUENTIAL LOGIC; CMOS INTEGRATED CIRCUITS; COMPUTATION THEORY; DATA TRANSFER; ENERGY DISSIPATION; INTEGRATION TESTING; MANY VALUED LOGICS; RAILS; THRESHOLD VOLTAGE; VLSI CIRCUITS;

CIRCUIT FAULTS; CIRCUIT TESTING; CMOS LOGIC CIRCUITS; CMOS TECHNOLOGY; CURRENT-MODE CIRCUIT; LOW VOLTAGES;

LOGIC CIRCUITS;

EID: 0002641082     PISSN: 15410110     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/PRDC.2000.897281     Document Type: Conference Paper

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