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Volumn , Issue , 2002, Pages 57-66

Low-complexity reorder buffer architecture

Author keywords

Low complexity datapath; Low power design; Reorder buffer

Indexed keywords

BUFFER STORAGE; COMPUTATIONAL COMPLEXITY; DATA RECORDING; ENERGY CONSERVATION; ENERGY DISSIPATION; MICROPROCESSOR CHIPS;

EID: 0036374205     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/514191.514202     Document Type: Conference Paper
Times cited : (26)

References (18)


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.