Analysis of gate-lag phenomena in recessed-gate and buried-gate GaAs MESFETs

IEEE Transactions on Electron Devices

Volumn 49, Issue 1, 2002, Pages 37-41

  Wakabayashi, Akira ^b   Mitani, Yasutaka ^b   Horio, Kazushige ^a,b  

^a IEEE   (Japan)

^b SHIBAURA INSTITUTE OF TECHNOLOGY   (Japan)

Author keywords

Buried gate structure; GaAs MESFET; Gate lag; Recessed gate structure; Surface state; Two dimensional simulation

Indexed keywords

BURIED -GATE STRUCTURE; CONDUCTION BAND; DEEP ACCEPTOR; DEEP DONOR; GATE LAG; RECESSED-GATE STRUCTURE; TWO-DIMENSIONAL SIMULATION;

BAND STRUCTURE; COMPUTER SIMULATION; ELECTRONIC DENSITY OF STATES; GATES (TRANSISTOR); SEMICONDUCTING GALLIUM ARSENIDE; SEMICONDUCTOR DEVICE MODELS; SEMICONDUCTOR DEVICE STRUCTURES; THRESHOLD VOLTAGE;

MESFET DEVICES;

EID: 0036253280     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.974746     Document Type: Article

References (17)

1. Gate slow transients in GaAs MESFETs-Causes, cures, and impact on circuits
2. An AlGaAs/InGaAs pseudomorphic high electron mobility transistor with improved breakdown voltage for X-and K-u-band power applications
3. Modeling and suppression of the surface trap effect on drain current frequency dispersions in GaAs MESFETs
4. Substrate-induced gate lag in ion-implanted GaAs MESFETs
5. Mechanism for recoverable power drift power drift in PHEMTs
6. Modeling of current lag in GaAs ICs
7. Analysis of surface state effect on gate lag phenomena in GaAs MESFETs
8. Two-dimensional analysis of surface-state effects on turn-on characteristics in GaAs MESFETs
9. Two-dimensional analysis of substrate-trap effects on turn-on characteristics in GaAs MESFETs
10. Analysis of surface-state effects on gate-lag phenomena in recessed-gate and buried-gate GaAs MESFETs
11. New and unified model for Schottky barrier and III-V insulator interface states formation
12. Surface Fermi level of III-V compound semiconductor-dielectric interfaces
13. Avalanche breakdown and surface deep-level trap effects in GaAs MESFETs
14. Compensation mechanism in liquid-encapsulated czochralski GaAs: Importance of melt stoichiometry
15. Two-dimensional simulations of drain-current transients in GaAs MESFETs with semi-insulating substrate compensated by deep levels
16. Low-voltage operation GaAs spike-gate power FET with high power-added efficiency
17. High power-added efficiency and low distortion GaAs power FET employing spike-gate structure