An on-chip 100 GHz-sampling rate 8-channel sampling oscilloscope with embedded sampling clock generator

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2002, Pages 182-183+458+179

  Takamiya, Makoto ^a   Mizuno, Masayuki ^a   Nakamura, Kazuyuki ^a  

^a NEC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; CAPACITORS; CMOS INTEGRATED CIRCUITS; ELECTRIC POTENTIAL; ELECTRIC SWITCHES; EMBEDDED SYSTEMS; LSI CIRCUITS; MICROPROCESSOR CHIPS; POWER AMPLIFIERS; SIGNAL PROCESSING; WAVEFORM ANALYSIS;

SAMPLING CLOCK GENERATORS (SCG); SAMPLING OSCILLOSCOPES;

CATHODE RAY OSCILLOSCOPES;

EID: 0036116894     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. Reduced substrate noise digital design for improving embedded analog performance
2. Application of on-chip samplers for test and measurement of integrated circuits
3. 2.5 GHz 4-phase clock generator with scalable and no feedback loop architecture
4. A portable digital DLL for high-speed CMOS interface circuits