SCOPUS 정보 검색 플랫폼 - 논문 보기

메뉴 건너뛰기

Microelectronics Reliability

Volumn 41, Issue 11, 2001, Pages 1761-1770

Advanced 2D/3D ESD device simulation - A powerful tool already used in a pre-Si phase

(6) Esmark, K a Stadler, W a Wendel, M a Gossner H a Guggenmos, X a Fichtner, W b

a INFINEON TECHNOLOGIES AG (Germany)

b ETH ZURICH (Switzerland)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; CURRENT VOLTAGE CHARACTERISTICS; OPTIMIZATION; SEMICONDUCTING SILICON;

PROTECTION ELEMENTS;

ELECTROSTATIC DEVICES;

EID: 0035501159 PISSN: 00262714 EISSN: None Source Type: Journal
DOI: 10.1016/S0026-2714(01)00032-4 Document Type: Conference Paper

Times cited : (3)

References (19)

1
- 0003209089
- Three-dimensional transient electrothermal simulations of electrostatic discharge protection circuits
- (1994) Proc EOS/ESD Symp , pp. 246-257
- Voldmann, S.¹ Furkay, S.² Slinkman, J.³

2
- 0033279350
- Influence of gate length on ESD performance for deep sub-micron CMOS technology
- (1999) Proc EOS/ESD Symp , pp. 95-104
- Bock, K.¹ Keppens, B.² De Heyn, V.³ Groeseneken, G.⁴

3
- 0027147693
- Prediction of ESD robustness in a process using 2-D device simulations
- (1993) IRPS , pp. 161-166
- Amerasekera, A.¹ Chatterjee, A.² Chang, M.³

4
- 0032312818
- Characterization and optimization of a bipolar ESD-device by measurements and simulations
- (1998) Proc EOS/ESD Symp , pp. 290-300
- Stricker, A.¹ Mettler, S.² Wolf, H.³ Mergens, M.⁴ Wilkening, W.⁵ Gieser, H.⁶ Fichtner, W.⁷

5
- 0003437663
- New York: Wiley
- (1995) ESD in silicon integrated circuits
- Amerasekera, A.¹ Duvvury, C.²

6
- 0004199626
- ISE Integrated Systems Engineering AG, Zurich, Switzerland
- (1998) _ISE Reference Manual

7
- 0003091333
- Simulationsstudie zum durchbruchverhalten eines NMOS-transistors
- Proc Analog '99
- Esmark, K.¹ Stadler, W.² Guggenmos, X.³ Stange, A.⁴ Soppa, W.⁵ Fichtner, W.⁶

8
- 0033285112
- Impact-ionization in silicon at large operating temperatures
- Kyoto, Japan
- Proc 1999 Int Conf on Simulation of Semiconductor Processes and Devices (SISPAD) , pp. 27-30
- Valdinoci, M.¹ Ventura, D.² Vecci, M.C.³ Rudan, M.⁴ Baccarani, G.⁵ Illien, F.⁶ Stricker, A.⁷ Zullino, L.⁸

9
- 0022212124
- Transmission line pulsing techniques for circuit modeling of ESD phenomena
- (1985) Proc EOS/ESD Symp , pp. 49-54
- Maloney, T.¹ Khurana, N.²

10
- 0003093869
- PhD Thesis, in press
- Esmark, K.¹

11
- 0032320896
- Non-uniform triggering of gg-nMOSt investigated by combined emission microscopy and transmission line pulsing
- (1998) Proc EOS/ESD Symp , pp. 177-186
- Russ, C.¹ Bock, K.² Rasras, M.³ De Wolf, I.⁴ Groeseneken, G.⁵ Maes, H.E.⁶

12
- 0000111799
- Study of triggering homogeneities in gg-nMOS ESD protection devices via thermal mapping using backside laser interferometry
- (2000) Proc ESREF , pp. 1359-1364
- Litzenberger, M.¹ Fürböck, C.² Pogany, D.³ Gornik, E.⁴ Esmark, K.⁵ Gossner, H.⁶

13
- 0033279625
- (1999) Proc EOS/ESD , pp. 241-250
- Fürböck, C.¹ Pogany, D.² Litzenberger, M.³ Gornik, E.⁴ Seliger, N.⁵ Gossner, H.⁶ Müller-Lynch, T.⁷ Stecher, M.⁸ Werner, W.⁹

14
- 0004138929
- PhD Thesis, Shaker Verlag, Aachen, Germany, ISBN: 3-8265-6664-5
- ESD protection devices for CMOS technologies: Processing impact, modeling, and testing issues
- Russ, C.¹

15
- 0004005306
- New York: Wiley
- (1981) Physics of semiconductor devices, 2nd ed.
- Sze, S.M.¹

16
- 0031383750
- Electrical filamentation in ggMOS protection structures
- (1997) Proc EOS/ESD Symp , pp. 330-336
- Vashchenko, V.¹ Sinkevitch, V.²

17
- 0003279183
- PhD Thesis, ETH Zurich, Switzerland
- (1991)
- Abderhalden, J.¹

18
- 0003165717
- (1968) IEEE Trans Nuclear Sci , vol.15 , pp. 249-259
- Wunsch, D.C.¹ Bell, R.R.²

19
- 51849084615
- Analysis of HBM testers and specifications using 4th order lumped element model
- (1993) Proc EOS/ESD Symp , pp. 129-138
- Verhaege, K.¹ Groeseneken, G.² Maes, H.³ Gieser, H.⁴ Russ, C.⁵ Egger, P.⁶ Guggenmos, X.⁷ Kuper, F.⁸

* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.