Defect generation in ultra-thin SiO2 gate layers and SiO2/ZrO2 gate stacks and the dispersive transport model

Microelectronic Engineering

Volumn 59, Issue 1-4, 2001, Pages 367-371

  Houssa, M ^a,b,c   Afanas'ev, V V ^a   Stesmans, A ^a   Heyns, M M ^b  

^a UNIVERSITY OF LEUVEN   (Belgium)

^b IMEC   (Belgium)

^c AIX MARSEILLE UNIVERSITÉ   (France)

Author keywords

Defect generation; Dispersive transport; High permittivity gate stacks; Ultra thin gate dielectrics

Indexed keywords

CURRENT DENSITY; DEFECTS; ELECTRIC POTENTIAL; GATES (TRANSISTOR); MATHEMATICAL MODELS; MOS CAPACITORS; PERMITTIVITY; SILICA;

GATE STACKS;

ULTRATHIN FILMS;

EID: 0035498453     PISSN: 01679317     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0167-9317(01)00670-0     Document Type: Conference Paper

References (9)