Programmable 1-D rank filter of O(1) time complexity

IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

Volumn 48, Issue 9, 2001, Pages 876-881

  Pedroni, V A ^a  

^a UNIVERSIDADE TECNOLÓGICA FEDERAL DO PARANÁ   (Brazil)

Author keywords

Median filter; Min max filter; Nonlinear filter; Rank filter

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTATIONAL COMPLEXITY; COMPUTER SIMULATION; ELECTRIC FILTERS; INTEGRATED CIRCUIT TESTING; ONE DIMENSIONAL;

HARDWARE COMPLEXITY; PROGRAMMABLE RANK FILTERING; SOFTWARE PACKAGE SPICE; TIME COMPLEXITY; WINNER-TAKE-ALL CIRCUITS;

SIGNAL FILTERING AND PREDICTION;

EID: 0035456083     PISSN: 10577130     EISSN: None     Source Type: Journal    
DOI: 10.1109/82.965004     Document Type: Article

References (24)

1. Stack filters
2. Analysis of the properties of median and weighted median filters using threshold logic and stack filter representation
3. Orders statistics in digital image processing
4. Improved median filter using minmax algorithm for image processing
5. Progressive switching median filter for the removal of impulse noise from highly corrupted images
6. Recursive LMS L-filters for noise removal in images
7. VLSI median filters
8. Design of a switched-current median filter
9. Processors for generalizes stack filters
10. Single-clock-cycle two-dimensional median filter
11. SBRN processor for stack filters
12. A high-speed median circuit
13. A bit-level pipelined VLSI architecture for the running order algorithm
14. On the analysis of sorting networks from the viewpoint of circuit theory
15. A time-recursive implementation of threshold Boolean filters
16. CMOS analogue median circuit
17. High-speed accurate analogue CMOS rank filter
18. Rail-to-rail multiple-input min/max circuit
19. Analog implementation of fast min/max filtering
20. High-speed high-precision min/max circuits in CMOS technology
21. Winner-take-all networks of O(N) complexity
22. Neural n-port voltage comparator
23. A low-power CMOS analog vector quantizer