High-speed, accurate analogue CMOS rank filter

Electronics Letters

Volumn 36, Issue 7, 2000, Pages 593-594

  Fikos, G ^a   Vlassis, S ^a   Siskos, S ^a  

^a ARISTOTLE UNIVERSITY OF THESSALONIKI   (Greece)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC CURRENTS; ELECTRIC NETWORK ANALYSIS; ERROR ANALYSIS; LINEAR INTEGRATED CIRCUITS; TUNING;

RANK FILTERS;

ELECTRIC FILTERS;

EID: 0033876360     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:20000428     Document Type: Article

References (5)

1. DIETZ, P., and CARLEY, R.: 'An analog circuit technique for finding the median'. IEEE 1993 Custom Integrated Circuits Conf., San Diego, CA, 9-12 May 1993, pp. 6.1.1-6.1.4
2. URAHAMA, K., and NAGAO, T.: 'Direct analog rank filtering', IEEE Trans. Circuits Syst., 1995, 42, (7), pp. 385-388
3. OPRIS, I., and KOVACS, G.: 'A high-speed median circuit', IEEE J. Solid-State Circuits, 1997, 32, (6), pp. 905-908
4. VLASSIS, S., and SISKOS, S.: 'CMOS analogue median circuit', Electron. Lett., 1999, 35, (13), pp. 1038-1040
5. TRAFF, H.: 'Novel approach to high speed CMOS current comparators', Electron. Lett., 1994, 28, (3), pp. 310-312