Techniques for the creation of digital watermarks in sequential circuit designs

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 20, Issue 9, 2001, Pages 1101-1117

  Oliveira, Arlindo L ^a,b,c,d  

^a IEEE   (Portugal)

^b INSTITUTO SUPERIOR TÉCNICO   (Portugal)

^c INESC ID   (Portugal)

^d Cadence Laboratories / INESC ID   (Portugal)

Author keywords

Digital watermarks; Intellectual property protection; Sequential circuits; State transition graph

Indexed keywords

STATE TRANSITION GRAPHS (STG);

ALGORITHMS; COMPUTER HARDWARE DESCRIPTION LANGUAGES; DIGITAL WATERMARKING; GRAPHIC METHODS; INTELLECTUAL PROPERTY;

SEQUENTIAL CIRCUITS;

EID: 0035440030     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.945306     Document Type: Article

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