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Volumn , Issue , 1998, Pages 186-189
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Signature hiding techniques for FPGA intellectual property protection
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Author keywords
[No Author keywords available]
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Indexed keywords
DIGITAL INTEGRATED CIRCUITS;
INTEGRATED CIRCUIT LAYOUT;
INTELLECTUAL PROPERTY;
SIGNATURE HIDING METHOD;
WATERMARKING;
FIELD PROGRAMMABLE GATE ARRAYS;
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EID: 0032314638
PISSN: 10923152
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1145/288548.288606 Document Type: Conference Paper |
Times cited : (74)
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References (13)
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