Hierarchical watermarking in IC design

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 1998, Pages 295-298

  Charbon, Edoardo ^a  

^a CADENCE DESIGN SYSTEMS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; TOPOLOGY;

HIERARCHICAL WATERMARKING;

INTEGRATED CIRCUIT LAYOUT;

EID: 0031638306     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)