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Volumn 41, Issue 7, 2001, Pages 1045-1048

Sub-100 nm CMOS circuit performance with high-K gate dielectrics

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; COMPUTER SIMULATION; DIELECTRIC MATERIALS; GATES (TRANSISTOR); INTEGRATED CIRCUIT TESTING; MONTE CARLO METHODS; SILICA;

EID: 0035394420     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0026-2714(01)00068-3     Document Type: Article
Times cited : (3)

References (6)


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.