A high-speed, low-power clock generator for a microprocessor application

IEEE Journal of Solid-State Circuits

Volumn 33, Issue 11, 1998, Pages 1634-1638

  Von Kaenel, Vincent R ^a,b  

^a HEWLETT PACKARD COMPANY   (United States)

^b IEEE   (United States)

Author keywords

Clock generator; Clocking; Low power analog circuits; Phase locked loop (PLL)

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRONIC TIMING DEVICES; PHASE LOCKED LOOPS; PULSE GENERATORS; VARIABLE FREQUENCY OSCILLATORS;

LOW-POWER CLOCK GENERATORS;

MICROPROCESSOR CHIPS;

EID: 0032204699     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.726549     Document Type: Article

References (10)

1. B. Gieseke et al., "A 600 MHz superscalar RISC microprocessor with out-of-order execution," in ISSCC Dig. Tech. Papers, Feb. 1997, pp. 180-181.
2. V. R. von Kaenel et al., "A 320 MHz 1.5 mW@1.35 V CMOS PLL for microprocessor clock generation." IEEE J. Solid-State Circuits, vol. 31, pp. 1715-1722, Nov. 1996.
3. E. Vittoz and O. Neyroud, "A low-voltage CMOS bandgap reference." IEEE J. Solid-State Circuits, vol. SC-14, pp. 573-577, June 1979.
4. F. M. Gardner, Phaselock Techniques, 2nd ed. New York: Wiley, 1979.
5. V. R. von Kaenel et al., "A 600 MHz CMOS PLL microprocessor clock generator with a 1.2 GHz VCO," in ISSCC Dig. Tech. Papers. Feb. 1998, pp. 396-397.
6. T. H. Lee et al., "A 2.5 V CMOS delay-locked loop for an 18 Mbit, 500 Megabyte/s DRAMA," IEEE J. Solid-State Circuits, vol. 29. pp. 1491-1496. Dec. 1994.
7. D.-K. Jeong et al., "Dising of PLL-based clock generation circuits," IEEE J. Solid-State Circuits, vol. SC-22, pp. 225-261, Apr. 1987.
8. I.-K. Young, K. Wong, and J. Greason, "A PLL clock generator with -110 MHz of lock range for microprocessors" IEEE J. Solid-State Circuits, vol. 27, pp. 1599-1607, Nov. 1992.
9. F. M. Gardner, "Change-pump phase-locked-loops," IEEE Trans. Commun, vol. COM 28. pp. 1849-1858. Nov 1980.
10. Z.-X. Zhang, H. Du, and M.-S Lee, "A 360 MHz 3 V CMOS PLL with 1 V peak-peak power supply noise tolerance," in IEEE ISSCC Dig. Tech. Papers, Feb. 1996. pp. 134-135.