Fault-tolerant training of neural networks in the presence of MOS transistor mismatches

IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

Volumn 48, Issue 3, 2001, Pages 272-281

  Öĝrenci, Arif Selçuk ^a,b   Dündar, Günhan ^c   Balktr, Sina ^d  

^a IEEE   (Turkey)

^b KADIR HAS UNIVERSITY   (Turkey)

^c BOGAZICI UNIVERSITY   (Turkey)

^d UNIVERSITY OF NEBRASKA LINCOLN   (United States)

Author keywords

Backpropagation; Neural network hardware; Neural network training; Transistor mismatch

Indexed keywords

ANALOG NEURAL NETWORK CIRCUITRY; FAULT TOLERANT TRAINING; NOISE INJECTION;

BACKPROPAGATION; COMPUTER SOFTWARE; FAULT TOLERANT COMPUTER SYSTEMS; MATHEMATICAL MODELS; NEURAL NETWORKS; STATISTICAL METHODS;

MOSFET DEVICES;

EID: 0035268207     PISSN: 10577130     EISSN: None     Source Type: Journal    
DOI: 10.1109/82.924069     Document Type: Article

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