Experimental demonstration of single flux quantum logic with resettable latch

IEEE Transactions on Applied Superconductivity

Volumn 10, Issue 2, 2000, Pages 1612-1616

  Furuta, Futoshi ^a   Akahori, Akira ^a   Mori, Naoko ^a   Sato, Tukashi ^a   Takeuchi, Nobuo ^a   Hasegawa, Hiroaki ^a   Suzuki, Yasutoshi ^a   Fujimaki, Akira ^a   Hayakawa, Hisao ^a  

^a NAGOYA UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; FLIP FLOP CIRCUITS; MAGNETIC FLUX;

SINGLE FLUX QUANTUM LOGIC WITH RESETTABLE LATCH (SFQ-RL);

LOGIC CIRCUITS;

EID: 0034205314     PISSN: 10518223     EISSN: None     Source Type: Journal    
DOI: 10.1109/77.848310     Document Type: Article

References (6)

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2. F. Furuta, Y. Suzuki, E. Oya, S. Matsumoto, H. Akaike, A. Fujimaki, H. Hayakawa, and Y. Takai, "New logic circuits based on SFQ signals," IEEE Trans. Appl. Superconduct., vol. 9, pp. 3553-3556, Jun. 1999.
3. E. S. Fang and T. V. Duzer, "A Josephson integrated circuit simulator (JSIM) for superconductive electronics application," in Ext. Abst. of 1989 Int. Superconductive Electronics Conf., Tokyo, Japan, 1989, pp. 407-410.
4. H. Numata, S. Nagasawa, and S. Tahara, "Fabrication process for submicron Josephson junctions," in Ext. Abst. of 1993 Int. Superconductive Electronics Conf, Boulder, CO, 1993, pp. 280-281.
5. S. Nagasawa, Y. Hashimoto, H. Numata, and S. Tahara, "A 380ps, 9.5mW Josephson 4-Kbit RAM operated at a high bit yield," IEEE Trans. Appl. Superconduct., vol. 5, pp. 2447-2452, Jun. 1995.
6. F. Furuta, H. Hasegawa, Y. Suzuki, E. Oya, H. Akaike, A. Fujimaki, and H. Hayakawa, "Proposition and demonstration of SFQ-RL," Tech. Rep., IEICE, SCE98-31(1998-11), 1998.