A new concept for ultra-low power and ultra-high clock rate circuits

IEEE Transactions on Applied Superconductivity

Volumn 11, Issue 1 I, 2001, Pages 333-336

  Silver, Arnold H ^a,b   Herr, Quentin P ^a  

^a NORTHROP GRUMMAN CORPORATION   (United States)

^b NONE

Author keywords

[No Author keywords available]

Indexed keywords

POWER DISSIPATION; SELF CLOCKED COMPLEMENTARY LOGIC; SINGLE FLUX QUANTUM DEVICES; SUPERCONDUCTOR LOGIC;

CMOS INTEGRATED CIRCUITS; COMPARATOR CIRCUITS; COMPUTER SIMULATION; LOGIC GATES; SHIFT REGISTERS; TIMING CIRCUITS;

LOGIC CIRCUITS;

EID: 0035268105     PISSN: 10518223     EISSN: None     Source Type: Journal    
DOI: 10.1109/77.919350     Document Type: Conference Paper

References (13)

1. RSFQ logic/memory family: A new Josephson-junction technology for sub-terahertz-clock-frequency digital systems
2. Rapid single flux quantum T-flip-flop operating up to 770 GHz
3. 2 Nb integrated circuit process
4. Decimation filters based on RSFQ logic/memory cells
5. Design and low speed testing of a four-bit RSFQ multiplier-accumulator
6. Parameter variations and synchronization of RSFQ circuits
7. Two-phase clocking for medium to large RSFQ circuits
8. High-speed operation of a 64-bit circular shift register
9. Case study in RSFQ design: Fast pipelined parallel adder
10. Delay insensitive RSFQ circuits with zero static power dissipation
11. SAIL high temperature superconductor digital logic improvements and analysis
12. Operation of SAIL HTS digital circuits near 1 GHz
13. Josephson weak-link devices