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Volumn 9, Issue 2 PART 3, 1999, Pages 3714-3720

Case study in rsfq design: fast pipelined parallel adder

Author keywords

[No Author keywords available]

Indexed keywords

CARRY LOGIC; COMPUTER SIMULATION; FABRICATION; FLIP FLOP CIRCUITS; GATES (TRANSISTOR); JOSEPHSON JUNCTION DEVICES; PIPELINE PROCESSING SYSTEMS;

EID: 0032646032     PISSN: 10518223     EISSN: None     Source Type: Journal    
DOI: 10.1109/77.783835     Document Type: Article
Times cited : (30)

References (19)


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.