Reconsideration of off-leakage current estimation of sub-100-nm SOI MOSFETs and device selection for applications

IEEE International SOI Conference

Volumn , Issue , 2001, Pages 145-146

  Yanagi, S I ^a   Omura, Y ^a  

^a KANSAI UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; ELECTRIC FIELD EFFECTS; GATES (TRANSISTOR); LEAKAGE CURRENTS; THRESHOLD VOLTAGE;

BAND-TO-BAND TUNNELING (BBT);

MOSFET DEVICES;

EID: 0035159833     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)