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Volumn E83-A, Issue 12, 2000, Pages 2657-2663

Computation of AB2 multiplier in GF(2m) using an efficient low-complexity cellular architecture

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER ARCHITECTURE; DIGITAL ARITHMETIC; PARALLEL PROCESSING SYSTEMS; POLYNOMIALS;

EID: 0034514785     PISSN: 09168508     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article
Times cited : (25)

References (12)
  • 1
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    • T. Le-Ngoc, and V.K. Bhargava, "Binarydecision approach to fast chien search for software decoding of BCH codes,"
    • Y.R. Shayan, T. Le-Ngoc, and V.K. Bhargava, "Binarydecision approach to fast chien search for software decoding of BCH codes," IEE Proc., vol.134, Pt. F, no.6, pp.629-632, 1987.
    • IEE Proc., Vol.134, Pt. F, No.6, Pp.629-632, 1987.
    • Shayan, Y.R.1
  • 4
    • 0032023646 scopus 로고    scopus 로고
    • "Low complexity bit-parallel canonical and normal basis multipliers for a class of finite fields,"
    • O.K. Koc and B. Sunar, "Low complexity bit-parallel canonical and normal basis multipliers for a class of finite fields," IEEE Trans. Comput., vol.47, no.3, pp.353-356, 1998.
    • IEEE Trans. Comput., Vol.47, No.3, Pp.353-356, 1998.
    • Koc, O.K.1    Sunar, B.2
  • 5
    • 0032206245 scopus 로고    scopus 로고
    • M.A. Hasan, and L.F. Blake, "New low-complexity bit-parallel finite field multipliers using weakly dual bases,"
    • H. Wu, M.A. Hasan, and L.F. Blake, "New low-complexity bit-parallel finite field multipliers using weakly dual bases," IEEE Trans. Comput., vol.47, no.ll, pp.1223-1234, 1998.
    • IEEE Trans. Comput., Vol.47, No.ll, Pp.1223-1234, 1998.
    • Wu H1
  • 7
    • 0025387890 scopus 로고    scopus 로고
    • "A VLSI design for computing exponentiations in GF(2m) and its application to generate pseudorandom number sequences,"
    • C.C. Wang and D. Pei, "A VLSI design for computing exponentiations in GF(2m) and its application to generate pseudorandom number sequences," IEEE Trans. Comput., vol.39, no.2, pp.258-262, 1990.
    • IEEE Trans. Comput., Vol.39, No.2, Pp.258-262, 1990.
    • Wang, C.C.1    Pei, D.2
  • 9
    • 0003119118 scopus 로고    scopus 로고
    • And J.-H. Guo, "New systolic arrays for C + AB'2, inversion, and division in GF(2m),"
    • pp.431-434, Istanbul, Turkey, Aug. 1995.
    • C.-L. Wang and J.-H. Guo, "New systolic arrays for C + AB'2, inversion, and division in GF(2m)," Proc. 1995 European Conference Circuit Theory Design (ECCTD'95), pp.431-434, Istanbul, Turkey, Aug. 1995.
    • Proc. 1995 European Conference Circuit Theory Design (ECCTD'95)
    • Wang, C.-L.1
  • 10
    • 0031257203 scopus 로고    scopus 로고
    • "VLSI architectures for computing exponentiations, multiplicative inverses, and divisions in GF(2m),"
    • vol.44, no.10, pp.847-855, Oct. 1997.
    • S.-W. Wei, "VLSI architectures for computing exponentiations, multiplicative inverses, and divisions in GF(2m)," IEEE Trans. Circuit fc Syst.-II: Analog and Digital Signal Processing, vol.44, no.10, pp.847-855, Oct. 1997.
    • IEEE Trans. Circuit Fc Syst.-II: Analog and Digital Signal Processing
    • Wei, S.-W.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.