-
1
-
-
0023439253
-
T. Le-Ngoc, and V.K. Bhargava, "Binarydecision approach to fast chien search for software decoding of BCH codes,"
-
Y.R. Shayan, T. Le-Ngoc, and V.K. Bhargava, "Binarydecision approach to fast chien search for software decoding of BCH codes," IEE Proc., vol.134, Pt. F, no.6, pp.629-632, 1987.
-
IEE Proc., Vol.134, Pt. F, No.6, Pp.629-632, 1987.
-
-
Shayan, Y.R.1
-
2
-
-
33749882212
-
"Foundations of coding,"
-
J. Adamek, "Foundations of coding," A Wiley-Interscience Publication, John Wiley & Sons, Inc, 1991.
-
A Wiley-Interscience Publication, John Wiley & Sons, Inc, 1991.
-
-
Adamek, J.1
-
3
-
-
0024753847
-
"Structure of parallel multipliers for a class of fields GF(2m),"
-
T. Itoh and S. Tsujii, "Structure of parallel multipliers for a class of fields GF(2m)," Info. Comp., vol.83, pp.21-40, 1989.
-
Info. Comp., Vol.83, Pp.21-40, 1989.
-
-
Itoh, T.1
Tsujii, S.2
-
4
-
-
0032023646
-
"Low complexity bit-parallel canonical and normal basis multipliers for a class of finite fields,"
-
O.K. Koc and B. Sunar, "Low complexity bit-parallel canonical and normal basis multipliers for a class of finite fields," IEEE Trans. Comput., vol.47, no.3, pp.353-356, 1998.
-
IEEE Trans. Comput., Vol.47, No.3, Pp.353-356, 1998.
-
-
Koc, O.K.1
Sunar, B.2
-
5
-
-
0032206245
-
M.A. Hasan, and L.F. Blake, "New low-complexity bit-parallel finite field multipliers using weakly dual bases,"
-
H. Wu, M.A. Hasan, and L.F. Blake, "New low-complexity bit-parallel finite field multipliers using weakly dual bases," IEEE Trans. Comput., vol.47, no.ll, pp.1223-1234, 1998.
-
IEEE Trans. Comput., Vol.47, No.ll, Pp.1223-1234, 1998.
-
-
Wu H1
-
6
-
-
0015201038
-
Jr. and O.K. Rushforth, "A cellular-array multiplier for GF(2m),"
-
B.A. Laws, Jr. and O.K. Rushforth, "A cellular-array multiplier for GF(2m)," IEEE Trans. Comput., vol.C-20, no.12, pp.1573-1578, 1971.
-
IEEE Trans. Comput., Vol.C-20, No.12, Pp.1573-1578, 1971.
-
-
Laws, B.A.1
-
7
-
-
0025387890
-
"A VLSI design for computing exponentiations in GF(2m) and its application to generate pseudorandom number sequences,"
-
C.C. Wang and D. Pei, "A VLSI design for computing exponentiations in GF(2m) and its application to generate pseudorandom number sequences," IEEE Trans. Comput., vol.39, no.2, pp.258-262, 1990.
-
IEEE Trans. Comput., Vol.39, No.2, Pp.258-262, 1990.
-
-
Wang, C.C.1
Pei, D.2
-
8
-
-
0028374435
-
"A systolic power-sum circuit for GF(2m),"
-
S.-W. Wei, "A systolic power-sum circuit for GF(2m)," IEEE Trans. Comput., vol.43, no.2, pp.22G-229, 1994.
-
IEEE Trans. Comput., Vol.43, No.2, Pp.22G-229, 1994.
-
-
Wei, S.-W.1
-
9
-
-
0003119118
-
And J.-H. Guo, "New systolic arrays for C + AB'2, inversion, and division in GF(2m),"
-
pp.431-434, Istanbul, Turkey, Aug. 1995.
-
C.-L. Wang and J.-H. Guo, "New systolic arrays for C + AB'2, inversion, and division in GF(2m)," Proc. 1995 European Conference Circuit Theory Design (ECCTD'95), pp.431-434, Istanbul, Turkey, Aug. 1995.
-
Proc. 1995 European Conference Circuit Theory Design (ECCTD'95)
-
-
Wang, C.-L.1
-
10
-
-
0031257203
-
"VLSI architectures for computing exponentiations, multiplicative inverses, and divisions in GF(2m),"
-
vol.44, no.10, pp.847-855, Oct. 1997.
-
S.-W. Wei, "VLSI architectures for computing exponentiations, multiplicative inverses, and divisions in GF(2m)," IEEE Trans. Circuit fc Syst.-II: Analog and Digital Signal Processing, vol.44, no.10, pp.847-855, Oct. 1997.
-
IEEE Trans. Circuit Fc Syst.-II: Analog and Digital Signal Processing
-
-
Wei, S.-W.1
-
11
-
-
0003818023
-
m),"
-
pp.493-500, Taipci, Taiwan, Dec. 1995.
-
m)," Proc. 1995 Int. Symp. Communications (ISCOM'95), pp.493-500, Taipci, Taiwan, Dec. 1995.
-
Proc. 1995 Int. Symp. Communications (ISCOM'95)
-
-
Guo, J.-H.1
|