VLSI architectures for computing exponentiations, multiplicative inverses, and divisions in GF(2m)

IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

Volumn 44, Issue 10, 1997, Pages 847-855

  Wei, Shyue Win ^a  

^a CHUNG HUA UNIVERSITY   (Taiwan)

Author keywords

Division; Exponentiation; Finite field arithmetic; Multiplicative inverse; Vlsi architecture

Indexed keywords

ADDERS; DIGITAL ARITHMETIC; DIVIDING CIRCUITS (ARITHMETIC); LOGIC GATES; MULTIPLYING CIRCUITS; PARALLEL PROCESSING SYSTEMS; PIPELINE PROCESSING SYSTEMS; SYSTOLIC ARRAYS;

EXPONENTIATIONS; LINEAR SYSTOLIC POWER SUM CIRCUITS;

VLSI CIRCUITS;

EID: 0031257203     PISSN: 10577130     EISSN: None     Source Type: Journal    
DOI: 10.1109/82.633444     Document Type: Article

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