-
1
-
-
33749969627
-
-
1C Design: The Current-Mode Approach, C. Toumazou, F. Lidgey, and D. Haigh, Eds., 1990.
-
P. Peregrinus, Analogue 1C Design: The Current-Mode Approach, C. Toumazou, F. Lidgey, and D. Haigh, Eds., 1990.
-
Analogue
-
-
Peregrinus, P.1
-
2
-
-
0000877577
-
-
43, pp. 843-845, Dec. 1996.
-
S. Kawahito and Y. Tadokoro, "CMOS class-AB current mirrors for precision current-mode analog-signal-processing," IEEE Trans. Circuits Syst. II, vol. 43, pp. 843-845, Dec. 1996.
-
And Y. Tadokoro, CMOS Class-AB Current Mirrors for Precision Current-mode Analog-signal-processing, IEEE Trans. Circuits Syst. II, Vol.
-
-
Kawahito, S.1
-
3
-
-
0032136575
-
-
34, pp. 1625-27, Aug. 1998.
-
E. Bruun, "Worst case estimate of mismatch induced distortion in complementary CMOS current mirrors," Electron. Lett., vol. 34, pp. 1625-27, Aug. 1998.
-
Worst Case Estimate of Mismatch Induced Distortion in Complementary CMOS Current Mirrors, Electron. Lett., Vol.
-
-
Bruun, E.1
-
4
-
-
33749971819
-
-
1993.
-
P. Peregrinus, Switched-Currents an Analogue Technique for Digital Technology, C. Toumazou, J.B. Hughes, and N.C. Battersby, Eds., 1993.
-
Switched-Currents an Analogue Technique for Digital Technology, C. Toumazou, J.B. Hughes, and N.C. Battersby, Eds.
-
-
Peregrinus, P.1
-
6
-
-
0014739342
-
-
132-133, Feb. 1970.
-
A. Sedra and K. Smith, "A second-generation current conveyor and its applications," IEEE Trans. Circuit Theory, vol. CT-17, pp. 132-133, Feb. 1970.
-
And K. Smith, a Second-generation Current Conveyor and Its Applications, IEEE Trans. Circuit Theory, Vol. CT-17, Pp.
-
-
Sedra, A.1
-
7
-
-
0025414827
-
-
137, no. 2, pp. 78-87, Apr. 1990.
-
A. Sedra, G. Roberts, and F. Gohh, "The current conveyor: History, progress and new results," Proc. Inst. Elect. Eng., ser. G, vol. 137, no. 2, pp. 78-87, Apr. 1990.
-
G. Roberts, and F. Gohh, the Current Conveyor: History, Progress and New Results, Proc. Inst. Elect. Eng., Ser. G, Vol.
-
-
Sedra, A.1
-
8
-
-
0020802978
-
-
19, no. 17, pp. 695-697, Aug. 1983.
-
D. Freitas and K. Current, "CMOS current comparator circuit," Electron. Lett., vol. 19, no. 17, pp. 695-697, Aug. 1983.
-
And K. Current, CMOS Current Comparator Circuit, Electron. Lett., Vol.
-
-
Freitas, D.1
-
9
-
-
0028513545
-
-
30, no. 20, pp. 1637-1639, Sept. 1994.
-
G. Palmisano and G. Palumbo, "Offset-compensated low power current comparators," Electron. Lett., vol. 30, no. 20, pp. 1637-1639, Sept. 1994.
-
And G. Palumbo, Offset-compensated Low Power Current Comparators, Electron. Lett., Vol.
-
-
Palmisano, G.1
-
10
-
-
0001249541
-
-
12, pp. 785-790, Dec. 1996.
-
G. Palmisano and G. Palumbo, "High performance CMOS current comparator design," IEEE Trans. Circuits Syst. II, vol. 12, pp. 785-790, Dec. 1996.
-
And G. Palumbo, High Performance CMOS Current Comparator Design, IEEE Trans. Circuits Syst. II, Vol.
-
-
Palmisano, G.1
-
11
-
-
0029755079
-
-
43, pp. 43-50, Jan. 1996.
-
A. Payne and C. Toumazou, "Analog amplifiers: Classification and generalization," IEEE Trans. Circuits Syst. I, vol. 43, pp. 43-50, Jan. 1996.
-
And C. Toumazou, Analog Amplifiers: Classification and Generalization, IEEE Trans. Circuits Syst. I, Vol.
-
-
Payne, A.1
-
12
-
-
0031997794
-
-
45, pp. 243-250, Feb. 1998.
-
G. Palmisano, G. Palumbo, and S. Pennisi, "Class AB CMOS current output stages with reduced harmonic distortion," IEEE Trans. Circuits Syst. II, vol. 45, pp. 243-250, Feb. 1998.
-
G. Palumbo, and S. Pennisi, Class AB CMOS Current Output Stages with Reduced Harmonic Distortion, IEEE Trans. Circuits Syst. II, Vol.
-
-
Palmisano, G.1
-
13
-
-
0032691690
-
-
35, no. 16, pp. 1329-1330, Aug. 1999.
-
G. Palumbo and S. Pennisi, "A class AB CMOS current mirror with low-voltage capability," Electron. Lett., vol. 35, no. 16, pp. 1329-1330, Aug. 1999.
-
And S. Pennisi, a Class AB CMOS Current Mirror with Low-voltage Capability, Electron. Lett., Vol.
-
-
Palumbo, G.1
-
14
-
-
0019073388
-
-
887-894, Oct. 1980.
-
B. Hosticka, "Dynamic CMOS amplifiers," IEEE J. Solid-State Circuits, vol. SC-15, pp. 887-894, Oct. 1980.
-
Dynamic CMOS Amplifiers, IEEE J. Solid-State Circuits, Vol. SC-15, Pp.
-
-
Hosticka, B.1
-
15
-
-
0033881636
-
-
36, no. 2, pp. 114-115, Jan. 2000.
-
G. Palmisano and S. Pennisi, "Low-voltage dynamic biasing technique for CMOS class AB current mode circuits," Electron. Lett., vol. 36, no. 2, pp. 114-115, Jan. 2000.
-
And S. Pennisi, Low-voltage Dynamic Biasing Technique for CMOS Class AB Current Mode Circuits, Electron. Lett., Vol.
-
-
Palmisano, G.1
-
16
-
-
0030704908
-
-
1.2-V SC circuits, Proc. IEEE ISCAS'97, pp. 2012-2015, June 1997.
-
G. Palmisano and G. Palumbo, "Clock boosters for 1.2-V SC circuits," Proc. IEEE ISCAS'97, pp. 2012-2015, June 1997.
-
And G. Palumbo, Clock Boosters for
-
-
Palmisano, G.1
-
17
-
-
0023330760
-
-
277-281, Apr. 1987.
-
J. Shieh, M. Paul, and B. Sheu, "Measurement and analysis of charge injection in MOS analog switches," IEEE J. Solid-State Circuits, vol. SC-22, pp. 277-281, Apr. 1987.
-
M. Paul, and B. Sheu, Measurement and Analysis of Charge Injection in MOS Analog Switches, IEEE J. Solid-State Circuits, Vol. SC-22, Pp.
-
-
Shieh, J.1
-
18
-
-
77956929068
-
-
1091-11 097, Dec. 1987.
-
G. Wegmann, E. Vittoz, and F. Rahali, "Charge injection in analog MOS switches," IEEE J. Solid-State Circuits, vol. SC-22, pp. 1091-11 097, Dec. 1987.
-
E. Vittoz, and F. Rahali, Charge Injection in Analog MOS Switches, IEEE J. Solid-State Circuits, Vol. SC-22, Pp.
-
-
Wegmann, G.1
-
19
-
-
33749908172
-
-
1991.
-
F. Maloberti, G. Palmisano, and G. Torelli, "A novel approach for high-frequency gain-compensated sample-and-hold circuits," in Proc. IEEE ISCAS'91, May 1991.
-
G. Palmisano, and G. Torelli, a Novel Approach for High-frequency Gain-compensated Sample-and-hold Circuits, in Proc. IEEE ISCAS'91, May
-
-
Maloberti, F.1
-
20
-
-
84881593757
-
-
379-385, 1975.
-
R. Suarez, P. Gray, and D. Hodges, "All MOS charge redistribution analog-to-digital conversion techniques part II," IEEEJ. Solid-State Circuits, vol. SC-10, pp. 379-385, 1975.
-
P. Gray, and D. Hodges, All MOS Charge Redistribution Analog-to-digital Conversion Techniques Part II, IEEEJ. Solid-State Circuits, Vol. SC-10, Pp.
-
-
Suarez, R.1
-
21
-
-
0027623488
-
-
28, pp. 849-852, July 1993.
-
T. Kaulberg, "A CMOS current-mode operational amplifier," IEEE J. Solid-State Circuits, vol. 28, pp. 849-852, July 1993.
-
A CMOS Current-mode Operational Amplifier, IEEE J. Solid-State Circuits, Vol.
-
-
Kaulberg, T.1
-
22
-
-
0031075776
-
-
200 MHz steered current operational amplifier in 1.2-mm CMOS technology, IEEEJ. Solid-State Circuits, vol. 32, pp. 245-249, Feb. 1997.
-
E. Abou-Allam and E. El-Masry, "A 200 MHz steered current operational amplifier in 1.2-mm CMOS technology," IEEEJ. Solid-State Circuits, vol. 32, pp. 245-249, Feb. 1997.
-
And E. El-Masry, a
-
-
Abou-Allam, E.1
-
23
-
-
0031996769
-
-
33, pp. 228-236, Feb. 1998.
-
G. Palmisano, G. Palumbo, and S. Pennisi, "High-drive CMOS current amplifier," IEEEJ. Solid-State Circuits, vol. 33, pp. 228-236, Feb. 1998.
-
G. Palumbo, and S. Pennisi, High-drive CMOS Current Amplifier, IEEEJ. Solid-State Circuits, Vol.
-
-
Palmisano, G.1
-
24
-
-
0001118269
-
-
35, pp. 632-636, Apr. 2000.
-
G. Giustolisi, G. Palmisano, G. Palumbo, and T. Segreto, "1.2-V CMOS op-amp with a dynamically biased output stage," IEEE J. Solid-State Circuits, vol. 35, pp. 632-636, Apr. 2000.
-
G. Palmisano, G. Palumbo, and T. Segreto, 1.2-V CMOS Op-amp with a Dynamically Biased Output Stage, IEEE J. Solid-State Circuits, Vol.
-
-
Giustolisi, G.1
|