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Volumn 35, Issue 16, 1999, Pages 1329-1330

Low-voltage class AB CMOS current output stage

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; COMPUTER SIMULATION; ELECTRIC CURRENTS; ELECTRIC RESISTANCE; FREQUENCY RESPONSE; FREQUENCY STABILITY; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT MANUFACTURE; OPERATIONAL AMPLIFIERS; TRANSCONDUCTANCE;

EID: 0032691690     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:19990845     Document Type: Article
Times cited : (12)

References (4)
  • 2
    • 0032136575 scopus 로고    scopus 로고
    • Worst case estimate of mismatch induced distortion in complementary CMOS current mirrors'
    • BRUUN, E.: 'Worst case estimate of mismatch induced distortion in complementary CMOS current mirrors', Electron. Lett., 1998, 34, pp. 1625-1627
    • (1998) Electron. Lett. , vol.34 , pp. 1625-1627
    • Bruun, E.1
  • 3
    • 0344296442 scopus 로고
    • High linearity CMOS current output stage'
    • PALMISANO, G., PALUMBO, G., and PENNISI, s.: 'High linearity CMOS current output stage', Electron. Lett., 1994, 31, (10), pp. 789-790
    • (1994) Electron. Lett. , vol.31 , Issue.10 , pp. 789-790
    • Palmisano, G.1    Palumbo, G.2    Pennisi, S.3
  • 4
    • 0032166836 scopus 로고    scopus 로고
    • Activebootstrapping gain-enhancement technique for low-voltage circuits'
    • SEEVINCK, E., DU PLESSIS, M., JOUBERT, T., and THERON, A.: 'Activebootstrapping gain-enhancement technique for low-voltage circuits', IEEE Trans., 1998, CASII-45, (9), pp. 1250-1254
    • (1998) IEEE Trans. , vol.CASII-45 , Issue.9 , pp. 1250-1254
    • Seevinck, E.1    Du Plessis, M.2    Joubert, T.3    Theron, A.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.