Low-voltage dynamic biasing technique for CMOS class AB current-mode circuits

Electronics Letters

Volumn 36, Issue 2, 2000, Pages 114-115

  Palmisano, G ^a   Pennisi, S ^a  

^a UNIVERSITY OF CATANIA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITORS; COMPUTER SIMULATION; ELECTRIC POTENTIAL; INTEGRATED CIRCUIT LAYOUT;

CURRENT MODE CIRCUITS; LOW VOLTAGE DYNAMIC BIASING;

CMOS INTEGRATED CIRCUITS;

EID: 0033881636     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:20000120     Document Type: Article

References (5)

1. TOUMAZOU, C., LIDGEY, F., and HAIGH, D. (Eds.): 'Analogue IC design: the current-mode approach' (Peter Peregrinus, 1990)
2. TOUMAZOU, C., HUGHES, J.B., and BATTERSBY, N.C. (Eds.): 'Switched-currents: an analogue technique for digital technology' (Peter Peregrinus, 1993)
3. PALUMBO, G., and PENNISI, S.: 'Low voltage class AB CMOS current output stage', Electron. Lett., 1999, 35, (16), pp. 1329-1330
4. PALMISANO, G., PALUMBO, G., and PENNISI, S.: 'CMOS current amplifiers' (Kluwer Academic Publishers, 1999)
5. PALMISANO, G., and PALUMBO, G.: 'Clock boosters for 1.2-V SC circuits'. IEEE ISCAS'97, Hong Kong, June 1997, pp. 2012-2015