Measurement and Analysis of Charge Injection in MOS Analog Switches

IEEE Journal of Solid-State Circuits

Volumn 22, Issue 2, 1987, Pages 277-281

  Shieh, Je Hurn ^a   Patil, Mahesh ^a   Sheu, Bing J ^a  

^a UNIVERSITY OF SOUTHERN CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC MEASUREMENTS; INTEGRATED CIRCUITS - TESTING; SEMICONDUCTOR MATERIALS - DOPING; SUBSTRATES - MATERIALS;

ON-CHIP TEST CIRCUITRY; SIGNAL SOURCE RESISTANCE AND CAPACITANCE; SWITCH CHARGE INJECTION MEASUREMENT AND ANALYSIS;

SEMICONDUCTOR DEVICES, MOS;

EID: 0023330760     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/JSSC.1987.1052713     Document Type: Article

References (8)

1. B. J. Sheu and C. Hu, “Switched-induced error voltage on a switched capacitor,” IEEE J. Solid-State Circuits, vol. SC-19, pp. 519–525, Aug. 1984.
2. R. E. Suarez, P. R. Gray, and D. A. Hodges, “All-MOS charge redistribution analog-to-digital conversion techniques: Part II,” IEEE J. Solid-State Circuits, vol. SC-10, pp. 379–385, Dec. 1975.
3. R. C. Yen and P. R. Gray, “An MOS switched-capacitor instrumentation amplifier,” IEEE J. Solid-State Circuits, vol. SC-17, pp. 1008–1013, Dec., 1982.
4. D. MacQuigg, “Residual charge on a switched capacitor,” IEEE J. Solid-State Circuits, vol. SC-18, pp. 811–813, Dec, 1983.
5. W. B. Wilson, H. Z. Massoud, E. J. Swanson, R. T. George, Jr., and R. B. Fair, “Measurement and modeling of charge feedthrough in n-channel MOS analog switches “ IEEE J. Solid-State Circuits, vol. SC-20, no. 6, pp. 1206–1213, Dec. 1985.
6. E. Vittoz, “Microwatt switched capacitor circuit design,” Electro-Sci. and Technol., vol. 9, no. 4, 263–273, 1982.
7. P. R. Gray and R. G. Meyer, Analysis and Design of Digital Integrated Circuits, 2nd ed. New York: Wiley, 1984.
8. J. J. Paulos and D. A. Antoniadis, “Measurement of minimum-geometry MOS transistor capacitances,” IEEE Trans. Electron Devices, vol. ED-32, no. 2, pp. 357–363, Feb. 1985.