Sub-0.1 μm gate etch processes: Towards some limitations of the plasma technology?

Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures

Volumn 18, Issue 1, 2000, Pages 156-165

  Desvoivres, L ^a   Vallier, L ^a,b   Joubert, O ^a,b  

^a ORANGE LABS   (France)

^b CEA LETI   (France)

Author keywords

[No Author keywords available]

Indexed keywords

AMORPHOUS SILICON; ANISOTROPY; ASPECT RATIO; ELLIPSOMETRY; HELICONS; MASKS; PASSIVATION; PLASMA ETCHING; PLASMA SOURCES; SILICON WAFERS; SUBSTRATES; X RAY PHOTOELECTRON SPECTROSCOPY;

GATE ETCH PROCESSES; HIGH DENSITY PLASMA HELICON SOURCES; KINETIC ELLIPSOMETRY;

MOS DEVICES;

EID: 0034350503     PISSN: 10711023     EISSN: None     Source Type: Journal    
DOI: 10.1116/1.591168     Document Type: Article

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