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0033330054
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InP DHBT 68 GHz frequency divider
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Tang, B.1
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2
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0033342656
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74 GHz dynamic frequency divider using InAlAs/InGaAs/InP HEMTs
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K. Murata and Y. Yamane, “74 GHz dynamic frequency divider using InAlAs/InGaAs/InP HEMTs,” Electron. Lett., vol. 35, no. 23, pp. 2024-2025, 1999.
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Murata, K.1
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3
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0033640020
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80 GHz 4 : 1 frequency divider IC using nonself-aligned InP/InGaAs heterostructure bipolar transistors
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Jan.
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H. Nakajima, E. Sano, M. Ida, and S. Yamahata, “80 GHz 4 : 1 frequency divider IC using nonself-aligned InP/InGaAs heterostructure bipolar transistors,” Electron. Lett., vol. 36, no. 1, pp. 34-35, Jan. 2000.
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Nakajima, H.1
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4
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0034428843
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53 GHz static frequency divider in a Si/SiGe bipolar technology
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Feb
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M. Wurzer, T. F. Meister, H. Knapp, K. Aufinger, R. Schreiter, S. Boguth, and L. Treitinger, “53 GHz static frequency divider in a Si/SiGe bipolar technology,” in IEEE Int. Solid-State Circuits Conf., Feb. 2000, pp. 206-207.
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Wurzer, M.1
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Treitinger, L.7
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5
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0034429729
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82 GHz dynamic frequency divider in 5.5ps ECL SiGe HBTs
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Feb
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K. Washio, E. Ohue, K. Oda, R. Hayami, M. Tanabe, H. Shimamoto, T. Harada, and M. Kondo, “82 GHz dynamic frequency divider in 5.5ps ECL SiGe HBTs,” in IEEE Int. Solid-State Circuits Conf., Feb. 2000, pp. 210-211.
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6
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0027961670
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A 13.4-GHz CMOS frequency divider
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B. Razavi, K. F. Lee, and R.-H. Yan, “A 13.4-GHz CMOS frequency divider,” in IEEE Int. Solid-State Circuits Conf., Feb. 1994, pp. 176-177.
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Razavi, B.1
Lee, K.F.2
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8
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0027579531
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Low-power 1/2 fre quency dividers using 0.1 µm CMOS circuits built with ultrathin simox substrates
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Apr.
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M. Fujishima, K. Asada, Y. Omura, and K. Izumi, “Low-power 1/2 fre quency dividers using 0.1 µm CMOS circuits built with ultrathin simox substrates,” IEEE J. Solid-State Circuits, vol. 28, pp. 510-512, Apr. 1993.
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Fujishima, M.1
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9
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0000342482
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A novel high-speed latching operation flip-flop (HLO-FF) circuit and its application to a 19-Gb/s decision circuit using a 0.2 µm GaAs MESFET
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Oct.
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K. Murata, T. Otsuji, E. Sano, M. Ohhata, M. Togashi, and M. Suzuki, “A novel high-speed latching operation flip-flop (HLO-FF) circuit and its application to a 19-Gb/s decision circuit using a 0.2 µm GaAs MESFET,” IEEE J. Solid-State Circuits, vol. 30, no., pp. 1101-1108, Oct. 1995.
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Murata, K.1
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