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Volumn 21, Issue 9, 2000, Pages 391-393

Submicron super TFTs for 3-D VLSI applications

Author keywords

[No Author keywords available]

Indexed keywords

GRAIN SIZE AND SHAPE; SEMICONDUCTING SILICON; THRESHOLD VOLTAGE; VLSI CIRCUITS;

EID: 0034259591     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article
Times cited : (20)

References (9)
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    • S. Miyamoto et al., "High performance gate-all-around TFT(GAT) for high-density, low-voltage-operation, and low-power SRAMs," in Proc. 1997 Symp. VLSI Technology, Systems, and Applications, pp. 128-132.
    • Proc. 1997 Symp. VLSI Technology, Systems, and Applications , pp. 128-132
    • Miyamoto, S.1
  • 2
    • 0032663029 scopus 로고    scopus 로고
    • Metal node contact TFT SRAM cell for high-speed, low-voltage application
    • Apr.
    • K. S. Son, S. W. Kwon, Y. J. Lee, and D. M. Kim, "Metal node contact TFT SRAM cell for high-speed, low-voltage application," IEEE Trans. Electron Devices, vol. 46, pp. 805-806, Apr. 1999.
    • (1999) IEEE Trans. Electron Devices , vol.46 , pp. 805-806
    • Son, K.S.1    Kwon, S.W.2    Lee, Y.J.3    Kim, D.M.4
  • 3
    • 0032664319 scopus 로고    scopus 로고
    • "An asymmetric memory cell using a C-TFT for single-bit-line SRAM's
    • May
    • H. Kuriyama et al., "An asymmetric memory cell using a C-TFT for single-bit-line SRAM's," IEEE Trans. Electron Devices, vol. 46, pp. 927-931, May 1999.
    • (1999) IEEE Trans. Electron Devices , vol.46 , pp. 927-931
    • Kuriyama, H.1
  • 4
    • 36449009173 scopus 로고
    • Pd induced lateral crystallization of amorphous Si thin film
    • Mar.
    • S. Lee, Y. Jeon, and S. Joo, "Pd induced lateral crystallization of amorphous Si thin film," Appl. Phys. Lett., vol. 66, pp. 1671-1673, Mar. 1995.
    • (1995) Appl. Phys. Lett. , vol.66 , pp. 1671-1673
    • Lee, S.1    Jeon, Y.2    Joo, S.3
  • 5
    • 0030128485 scopus 로고    scopus 로고
    • Low temperature poly-Si thin-film transistor fabrication by metal-induced lateral crystallization
    • Apr.
    • S. Lee and S. Joo, "Low temperature poly-Si thin-film transistor fabrication by metal-induced lateral crystallization," IEEE Electron Device Lett., vol. 17, pp. 160-162, Apr. 1996.
    • (1996) IEEE Electron Device Lett. , vol.17 , pp. 160-162
    • Lee, S.1    Joo, S.2
  • 6
    • 0033343175 scopus 로고    scopus 로고
    • SOI formation from amorphous Silicon by metal-induced-lateral-crystallization (MILC) and subsequent high temperature annealing
    • S. Jagar et al., "SOI formation from amorphous Silicon by metal-induced-lateral-crystallization (MILC) and subsequent high temperature annealing," in Proc. Int. SOI Conf., 1999, pp. 112-113.
    • (1999) Proc. Int. SOI Conf. , pp. 112-113
    • Jagar, S.1
  • 7
    • 0033342070 scopus 로고    scopus 로고
    • Single grain thin-film-transistor(TFT) with SOI CMOS performance formed by metal-induced-lateral-crystallization
    • _, "Single grain thin-film-transistor(TFT) with SOI CMOS performance formed by metal-induced-lateral-crystallization," in IEDM Tech. Dig., 1999, pp. 293-296.
    • (1999) IEDM Tech. Dig. , pp. 293-296
  • 8
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    • High-performance germanium-seeded laterally crystallized TFTs for vertical device integration
    • Sept.
    • V. Subramanian and K. Saraswat, "High-performance germanium-seeded laterally crystallized TFTs for vertical device integration," IEEE Trans. Electron Devices, vol. 45, pp. 1934-1939, Sept. 1998.
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    • Subramanian, V.1    Saraswat, K.2
  • 9
    • 0033164586 scopus 로고    scopus 로고
    • Low-leakage germanium-seeded laterally crystallized single-grain 100-nm TFTs for vertical integration applications
    • July
    • V. Subramanian et al., "Low-leakage germanium-seeded laterally crystallized single-grain 100-nm TFTs for vertical integration applications," IEEE Electron Device Lett., vol. 20, pp. 341-343, July 1999.
    • (1999) IEEE Electron Device Lett. , vol.20 , pp. 341-343
    • Subramanian, V.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.