Improved switched-capacitor interpolators with reduced sample-and-hold effects

IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

Volumn 47, Issue 8, 2000, Pages 665-684

  Seng Pan, U ^a   Martins, Rui P ^b   Franca, José E ^b  

^a UNIVERSITY OF MACAU   (Macao)

^b INSTITUTO SUPERIOR TÉCNICO   (Portugal)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; CAPACITANCE MEASUREMENT; CAPACITORS; ELECTRIC NETWORK ANALYSIS; ELECTRIC NETWORK SYNTHESIS; FIR FILTERS; INTEGRATED CIRCUIT LAYOUT; INTERPOLATION; OPERATIONAL AMPLIFIERS; SWITCHING CIRCUITS;

SWITCHED-CAPACITOR FILTERS; SWITCHED-CAPACITOR INTERPOLATORS;

CMOS INTEGRATED CIRCUITS;

EID: 0034247023     PISSN: 10577130     EISSN: None     Source Type: Journal    
DOI: 10.1109/82.861396     Document Type: Article

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