Multirate analog-digital systems for signal processing and conversion

Proceedings of the IEEE

Volumn 85, Issue 2, 1997, Pages 242-261

  Kumar, Jyotindra ^a,b,c  

^a INSTITUTO SUPERIOR TÉCNICO   (Portugal)

^b FEDERAL UNIVERSITY OF RIO DE JANEIRO   (Brazil)

^c Santa Barbara   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG TO DIGITAL CONVERSION; ELECTRIC FILTERS; ENCODING (SYMBOLS); INTEGRATED CIRCUITS;

MIXED-SIGNAL SYSTEMS;

SIGNAL PROCESSING;

EID: 0031069173     PISSN: 00189219     EISSN: None     Source Type: Journal    
DOI: 10.1109/5.554221     Document Type: Article

References (71)

1. R. Crochiere and L.R. Rabiner, Multirate Digital Signal Processing. Englcwood Cliffs, NJ: Prentice-Hall, 1983.
2. P. P. Vaidyanathan, Multirate Systems and Filter Banks. Englewood Cliffs, NJ: Prentice-Hall, 1993.
3. "Papers on TDM/FDM transmultiplexers," IEEE Trans. Commun., vol. COM-26, pp. 697-741, May 1978.
4. M. W. Hauser and R. W. Brodersen, "Circuit and technology considerations for MOS delta-sigma A/D converters," in Proc. IEEE Int. Symp. on Circ. Syst., San Jose, CA, Apr. 1986, pp. 1310-1315.
5. A. Gersho, "Charge-transfer filtering," Proc. IEEE, vol. 67, pp. 1.96-218, Feb. 1979.
6. R. Gregorian, K. Martin, and G. C. Temes, "Switched-capacitor circuit design," Proc. IEEE, vol. 71, pp. 941-966, Aug. 1983.
7. J. E. Franca and D. G. Haigh, "Design and applications of single-path frequency-translated switched-capacitor systems," IEEE Trans. Circ. Syst., vol. CAS-35, pp. 394-408, Apr. 1988.
8. P. Senn and M. S. Tawfik, "Concepts for the restitution of video signals using MOS analog circuits," in Proc. IEEE Int. Symp. on Circ. Syst., Helsinki, Finland, June 1991, pp. 1935-1938.
9. G. Uehara and P. Gray, "Practical aspects of high-speed decimation filter implementation," in Proc. IEEE Int. Symp. on Circ. Syst., San Diego, CA, May 1992, pp. 2308-2311.
10. S. K. Mitra, "Some unconventional applications of multirate digital signal processing," Proc. IEEE Int. Symp. on Circ. Syst. Singapore, pp. 13-16, June 1991.
11. R. Ansari and B. Liu, "Multirate digital signal processing," in Handbook for Digital Signal Processing, S. K. Mitra and J. F. Kaiser, Eds. New York: Wiley, 1993, ch. 14, pp. 981-1084.
12. M. Bellanger, G. Bonnerot, and M. Coudreuse, "Digital filtering by polyphase network: application to sample rate alteration and filter banks," IEEE Trans. Acoust., Speech Signal Process., vol. ASSP-24, pp. 109-114, Apr. 1976.
13. P. P. Vaidyanathan, P. A. Regalia, and S. K. Mitra, "Design of doubly complementary IIR digital filters using a single complex filter, with multirate applications," IEEE Trans. Circ. Syst., vol. CAS-34, pp. 378-389, Apr. 1987.
14. M. Renfors and T. Saramki, "Recursive N-th band digital filters-Part 1: Design and properties", IEEE Trans. Circ. Syst., vol. CAS-34, pp. 24-39, Jan. 1987.
15. F. A. P. Baruqui, A. Petraglia, S. K. Mitra, J. E. Franca, "Efficient IIR switched-capacitor decimators and interpolators," in Proc. 8th Europe. Signal Process. Conf., Trieste, Italy, pp. 791-794, Sept. 10-13, 1996.
16. D. Hoeschele, Jr., Analog-to-Digital and Digital-to-Analog Conversion-Techniques. New York: Wiley, 1986.
17. M. Demler, High-Speed Analog-to-Digital Conversion. New York: Academic, 1991.
18. R. van de Plassche, Integrated Analog-to-Digital and Digital-to-Analog Converters. Amsterdam: Academic/Kluwer, 1994.
19. J. C. Candy and G. C. Temes, Eds., Oversampling Delta-Sigma Converters: Theory, Design and Simulation. New York: IEEE Press, 1992.
20. Y. Matsuya et al., "A 16 bit oversampling A-to-D conversion technology using triple integration noise shaping," IEEE J. Solid-State Circ., vol. SC-22, pp. 921-929, Dec. 1987.
21. A. Petraglia and S. K. Mitra, "High speed A/D conversion incorporating a QMF bank," IEEE Trans. Instrum. Meas., vol. 41, pp. 427-431, June 1992.
22. _, "Design of magnitude preserving analog-to-digital converter," Trans. IEICE Japan, vol. E76-A, pp. 149-155, Feb. 1993.
23. W. C. Black and D. A. Hodges, "Time-interleaved converter arrays," IEEE J. Solid State Circ., vol. SC-15, pp. 1022-1029, Dec. 1980.
24. W. C. Black, "High speed CMOS A/D conversion techniques," Ph.D. dissertation, Dcpt. Electrical Eng. Computer Sci., Univ. Calif., Berkeley, 1980.
25. A. Petraglia and S. K. Mitra, "Effect of mismatches among A/D converters in a time-interleaved digitizer," IEEE Trans. Instrum. Meas., vol. 40, pp. 831-836, Oct. 1991.
26. K. Poulton, J. J. Corcoran, and T. Hornak, "A 1-GHz 6-bit ADC system," IEEE J. Solid State Circ., vol. SC-22, pp. 962-970, Dec. 1987.
27. A. Petraglia, F. Maloberti, and S. K. Mitra, "QMF-based A/D converters: Overview and new results," in Proc. Int. Conf. on Analog to Digital and Digital to Analog Conversion," Swansea, Wales, U.K., pp. 112-117, Sept. 1991.
28. P. A. Regalia et al., "Tree-structured complementary filter banks using allpass sections," IEEE Trans. Circ. Syst., vol. CAS-34, pp. 1470-1484, Dec. 1987.
29. Y. Tsividis and M. Banu, "Continuous-time MOSFET-C filters in VLSI," IEEE Trans. Circ. Syst., vol. CAS-33, no. 2, pp. 125-139, Feb. 1986.
30. J. L. Pennock, "CMOS triode transconductor for continuous-time active integrated filters," Electron. Lett., vol. 21, no. 18, pp. 817-818, Aug. 1985.
31. Y. Tsividis and L. O. Voorman, Eds., Integrated Continuous-Time Filters: Principles, Design, and Applications. New York: IEEE Press, 1993.
32. R. P. Martins, J. E. Franca, and F. Maloberti, "An optimum CMOS switched-capacitor antialiasing decimating filter," IEEE J. Solid-State Circ., vol. 28, no. 9, pp. 962-970, Sept. 1993.
33. J. E. Franca and R. P. Martins, "Novel solutions for anti-aliasing and anti-imaging filtering in CMOS video interface systems," in Proc. IEEE Workshop on Visual Signal Process, and Commun., Taiwan, R.O.C., June 1991, pp. 202-205.
34. Y. Duflos, J-C. Marin, and F. Dell'Ova, "A digital Y, Cr, Cb to analog R, G, B, decoder implementation in 1.2 μm BiCMOS technology," in Proc. BiCMOS Workshop, Univ. Bundeswehr, Munich, Germany, Sept. 1989.
35. G. Chiappano and D. Raveglia, "Anti-aliasing digital filters for video signal coders," in Proc. IEEE Int. Symp. Circ. Syst., Helsinki, Finland, June 1988, pp. 709-713.
36. F. O. Eynde and W. Sansen, "Design and optimization of CMOS wideband amplifiers," in Proc. IEEE Custom Integrated Circ. Conf. San Diego, CA, May 1989, pp. 25.7.1-25.7.4.
37. J. E. Franca, "Non-recursive polyphase switched-capacitor decimators and interpolators," IEEE Trans. Circ. Syst., vol. CAS-32, pp. 877-887, Sept. 1985.
38. J. E. Franca and S. Santos, "FIR switched-capacitor decimators with active-delayed block polyphase structures," IEEE Trans. Circ. Syst., vol. 35, pp. 1033-1037, Aug. 1988.
39. R. P. Martins and J. E. Franca, "A novel nth order IIR switched-capacitor decimator building block with optimum implementation," Proc. IEEE Int. Symp. on Circ. Syst., Portland, OR, May 1989, pp. 1471-1474.
40. J. E. Franca and R. P. Martins, "HR switched-capacitor decimator building blocks with optimum implementation," IEEE Trans. Circ. Syst., vol. 37, pp. 81-90, Jan. 1990.
41. R. P. Martins and J. E. Franca, "Cascade switched-capacitor decimators," IEEE Trans. Circ. Syst. - I: Fundamental Theory and Applicat., vol. 42, no. 7, pp. 367-376, July 1995.
42. _, "A 2.4 μm CMOS switched-capacitor video decimator with sampling rate reduction from 40.5 MHz to 13.5 MHz," Proc. IEEE Custom Integrated Circ. Conf., San Diego, CA, May 1989, pp. 25.4.1-25.4.4.
43. J. E. Franca, "Multirate switched-capacitor system approach to frequency division multiplexing," Electron. Lett., vol. 24, no. 8, pp. 501-503, Apr. 1988.
44. M. Vetterli, "Perfect transmultiplexers," in Proc. IEEE Int. Conf. on Acoust., Speech, and Signal Process., Tokyo, Japan, Apr. 1986, pp. 2567-2570.
45. R. D. Kollipillai, T. Q. Nguyen, and P. P. Vaidyanathan, "Theory and design of perfect transmultiplexers and their relation to perfect reconstruction QMF banks," in Proc. 23rd Annu. Asilomar Conf. on Signals, Syst., Computers, Pacific Grove, CA, Nov. 1989, pp. 247-251.
46. R. P. Ramachandran and P. Kabal, "Transmultiplexers: Perfect reconstruction and compensation of channel errors," Signal Process., vol. 21, no. 3, pp. 261-274, Nov. 1990.
47. J. E. Franca, "A single-path frequency-translated switched-capacitor bandpass filter system," IEEE Trans. Circ. Syst., vol. CAS-32, pp. 938-944, Sept. 1985.
48. L. E. Franks and I. W. Sandberg, "An alternative approach to the realization of network transfer functions: The N-path filter," Bell Syst. Techn. J., vol. 39, pp. 1321-1350, Sept. 1960.
49. A. Fetweiss and H. Wupper, "A solution to the balancing problem in N-path filters," IEEE Trans. Circ. Theory, vol. CT-18, pp. 403-405, May 1971.
50. D. J. Allstot and K. S. Tan, "A switched-capacitor N-path filter," in Proc. IEEE Int. Svmp. on Circ. Syst., Houston, TX, Apr. 1980, pp. 313-316.
51. M. B. Ghaderi, J. A. Nossek, and G. C. Temes, "Narrow-band switched-capacitor bandpass filters," IEEE Trans. Circ. Syst., vol. CAS-29, pp. 557-572, Aug. 1982.
52. S. K. Mitra, K. Mensa-Abadio, and K. Hirano, "Theory and application of all-digital N-path filters", IEEE Trans. Circ. Syst., vol. CAS-34, pp. 1045-1052, Sept. 1987.
53. G. Chiappano et al., "A tunable switched-capacitor programmable N-path tone receiver and generator," IEEE J. Solid-State Circ., vol. SC-23, no. 6, pp. 1418-1425, Dec. 1988.
54. R. Neves, A. Petraglia, S. Mitra, and J. E. Franca, "A new mixed analog-digital architecture for high-frequency narrow bandwidth channel digitalization," in Proc. IEEE Int. Symp. on Circ. Syst., Atlanta, GA, May 1996, vol. 1, pp. 437-440.
55. F. Maloberti, "Nonconventional signal processing by the use of sigma-delta technique: A tutorial introduction," in Proc. IEEE Int. Symp. on Circ. Syst., vol. 6, San Diego, CA, May 1992, pp. 2645-2648.
56. J. Grilo and J. E. Franca, "Four-quadrant multiplier combining sigma-delta and multirate processing techniques," Electron. Lett., vol. 27, no. 23, pp. 2146-2147, Nov. 1991.
57. S. K. Mitra and R. Gnanasekaran, "Block implementation of recursive digital filters: New structures and properties," IEEE Trans. Circ. Syst., vol. CAS-25, pp. 200-207, Aug. 1978.
58. R. Khoini-Poorfard and D. A. Johns, "Time interleaved over-sampling converters," Electron. Lett., Vol. 29, pp. 1673-1674, Sept. 1993.
59. E. King et al., "Parallel delta-sigma A/D conversion," in Proc. IEEE Custom Integrated Circ. Conf., San Diego, CA, May 1994, pp. 23.3.1-23.3.3.
60. R. Khoini-Poorfard and D. A. Johns, "Mismatch effects in time interleaved oversampling converters," Proc. IEEE Int. Symp. on Circ. Syst. London, U.K., May 1994, pp. 429-432.
61. I. Galton and H. T. Jensen, "Delta-sigma modulator based A/D conversion without oversampling," IEEE Trans. Circ. Syst. II: Analog and Digital Signal Process., vol. 42, pp. 773-784, Dec. 1995.
62. H. T. Jensen and I. Galton, "A robust parallel delta-sigma A/D converter architecture," in Proc. IEEE Int. Symp. on Circ. Syst., Seattle, WA, May 1995, pp. 1340-1343.
63. C. Mead, Analog VLSI and Neural Systems. Reading, MA: Addison-Wesley, 1989.
64. M. Winzker, K. Gruger, W. Gehrke, and P. Pirsch, "VLSI chip set for 2D HDTV subband filtering with on-chip line memories," IEEE J. Solid-State Circ., vol. 28, pp. 1354-1361, Dec. 1993.
65. T. C. Chen and R. J. P. De Figueiredo, "Image decimation and interpolation based on frequency domain analysis," IEEE Trans. Commun., vol. COM-32, pp. 479-184, Apr. 1984.
66. M. L. Liou and T. Russell, "An overview for video signal processing," Proc. 1987 IEEE Int. Symp. on Circ. and Syst., Philadelphia, PA, May 1987, pp. 208-211.
67. W. Ping and J. E. Franca, "SC polyphase structures for 2D analog filtering," Proc. IEEE Int. Symp. Circ. and Syst., Chicago, IL, May 1993, pp. 1038-1041.
68. _, "SC decimation techniques for 2D IIR filtering," Proc. IEEE Workshop on Visual Signal Process, and Commun., Melbourne, Australia, Sept. 1993, pp. 223-226.
69. _, "New form of realization of IIR switched-capacitor decimators," Electronics Lett., vol. 29, no. 11, pp. 953-954, 27 May 1993.
70. _, "Two-dimensional switched-capacitor decimating filters," IEEE Trans. Circ. Syst.-Part I: Fundamental Theory and Applicat., vol. 43, no. 4, pp. 257-271, Apr. 1996.
71. _, " A very compact 1.0 μm CMOS SC multirate 2-D image filter," to appear in Proc. Europe. Solid-State Circ. Conf., Neuchatel, Switzerland, Sept. 1996.