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Volumn 21, Issue 5, 2000, Pages 227-229

Reduced electron mobility due to nitrogen implant prior to the gate oxide growth

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE MEASUREMENT; CARRIER MOBILITY; COMPUTER SIMULATION; CURRENT VOLTAGE CHARACTERISTICS; ELECTRON TUNNELING; ION IMPLANTATION; NITROGEN; SEMICONDUCTING SILICON; SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR DOPING; THRESHOLD VOLTAGE;

EID: 0033741442     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/55.841304     Document Type: Article
Times cited : (12)

References (9)
  • 1
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    • High temperature rapid thermal nitridation of silicon dioxide for future VLSI applications
    • C. C. Chang, A. Kamgar, and D. Kahng, "High temperature rapid thermal nitridation of silicon dioxide for future VLSI applications," IEEE Electron Device Lett., vol. EDL-6, p. 476, 1985.
    • (1985) IEEE Electron Device Lett. , vol.EDL-6 , pp. 476
    • Chang, C.C.1    Kamgar, A.2    Kahng, D.3
  • 2
    • 0029723453 scopus 로고    scopus 로고
    • 25Å gate oxide without boron penetration for 0.25 and 0.3-μm pMOSFET's
    • C. T. Liu et al., "25Å gate oxide without boron penetration for 0.25 and 0.3-μm pMOSFET's," in VLSI Symp. Tech. Dig., 1996, p. 18.
    • (1996) VLSI Symp. Tech. Dig. , pp. 18
    • Liu, C.T.1
  • 3
    • 4243931996 scopus 로고    scopus 로고
    • Multiple gate oxide thickness for 2GHz system-on-a-chip technologies
    • C. T. Liu et al., "Multiple gate oxide thickness for 2GHz system-on-a-chip technologies," in IEDM Tech. Dig., 1998, p. 627.
    • (1998) IEDM Tech. Dig. , pp. 627
    • Liu, C.T.1
  • 4
    • 84886448052 scopus 로고    scopus 로고
    • Impact of nitrogen implant prior to the gate oxide growth on transient enhanced diffusion
    • A. Kamgar et al., "Impact of nitrogen implant prior to the gate oxide growth on transient enhanced diffusion," in IEDM Tech. Dig., 1997, p. 695.
    • (1997) IEDM Tech. Dig. , pp. 695
    • Kamgar, A.1
  • 5
    • 0002116716 scopus 로고    scopus 로고
    • High performance sub-0.08 μm CMOS with dual gate oxide and 9.7 ps inverter delay
    • M. Hargrove et al., "High performance sub-0.08 μm CMOS with dual gate oxide and 9.7 ps inverter delay," in IEDM Tech. Dig., 1998, p. 589.
    • (1998) IEDM Tech. Dig. , pp. 589
    • Hargrove, M.1
  • 6
    • 0030387112 scopus 로고    scopus 로고
    • High performance 0.2 μm CMOS with 25Å gate-oxide grown on nitrogen implanted Si substrates
    • C.-T. Liu et al., "High performance 0.2 μm CMOS with 25Å gate-oxide grown on nitrogen implanted Si substrates," in IEDM Tech. Dig., 1996, p. 499.
    • (1996) IEDM Tech. Dig. , pp. 499
    • Liu, C.-T.1
  • 7
    • 0033284985 scopus 로고    scopus 로고
    • Self-consistent simulation of quantization effects and tunneling current in ultra-thin gate oxide MOS devices
    • A. Ghetti, A. Hamad, P. J. Silverman, H. Vaidya, and N. Zhao, "Self-consistent simulation of quantization effects and tunneling current in ultra-thin gate oxide MOS Devices," in Proc. SISPAD Conf., 1999, p. 239.
    • (1999) Proc. SISPAD Conf. , pp. 239
    • Ghetti, A.1    Hamad, A.2    Silverman, P.J.3    Vaidya, H.4    Zhao, N.5
  • 8
    • 0009599273 scopus 로고
    • Characterization of electron mobility in the inverted (100) Si surface
    • A. G. Sabnis and J. T. Clemens, "Characterization of electron mobility in the inverted (100) Si surface," in IEDM Tech. Dig., 1979, p. 18.
    • (1979) IEDM Tech. Dig. , pp. 18
    • Sabnis, A.G.1    Clemens, J.T.2
  • 9
    • 0031144288 scopus 로고    scopus 로고
    • Preventing b penetration through 25Å gate oxides with nitrogen implant in the Si substrate
    • C.-T. Liu, Y. Ma, H. Luftman, and S. J. Hillenius, "Preventing B penetration through 25Å gate oxides with nitrogen implant in the Si substrate," IEEE Electron Device Lett., vol. EDL-18, p. 212, 1997.
    • (1997) IEEE Electron Device Lett. , vol.EDL-18 , pp. 212
    • Liu, C.-T.1    Ma, Y.2    Luftman, H.3    Hillenius, S.J.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.