Programming characteristics of p-channel Si nano-crystal memory

IEEE Electron Device Letters

Volumn 21, Issue 6, 2000, Pages 313-315

  Han, Kwangseok ^a   Kim, Ilgweon ^a,b   Shin, Hyungcheol ^a  

^a Korea Advanced Institute of Science and Technology (KAIST)   (South Korea)

^b Hyundai Microelectronics Co Ltd   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRON TUNNELING; NANOSTRUCTURED MATERIALS; SEMICONDUCTING SILICON;

NANOCRYSTAL MEMORY;

NONVOLATILE STORAGE;

EID: 0033729517     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/55.843161     Document Type: Article

References (7)

1. I. Kim et al., "Room temperature single electron effects in Si quantum dot memory with oxide-nitride tunneling dielectric," in IEDM Tech. Dig., 1998, pp. 111-114.
2. S. Tiwari, F. Rana, K. Chan, and O. Buchanan, "Volatile and nonvolatile memores in silicon with nano-crystal storage," in IEDM Tech. Dig., 1995, pp. 521-524.
3. K. Han, I. Kim, and H. Shin, "PMOS-based Si nano-crystal memory," in Proc. Silicon Nanoelectronics Workshop, Kyoto, Japan, June 1999, pp. 10-11.
4. S. Tiwari et al., "A silicon nanocrystals based memory," Appl. Phys. Lett., vol. 68, pp. 1377-1379, Mar. 1996.
5. I. G. Kim, H. S. Kim, J. H. Lee, and H. Shin, "Silicon nano-crystal memory with tunneling nitride," Proc. SSDM, pp. 170-171, Sept. 1998.
6. x," in IEDM Tech. Dig., 1998, pp. 115-118.
7. I. Kim, S. Han, K. Han, J. Lee, and H. Shin, "Room temperature single electron effects in a Si nano-crystal memory," IEEE Electron Device Lett., vol. 20, pp. 630-631, Dec. 1999.