Room temperature single electron effects in a Si nano-crystal memory

IEEE Electron Device Letters

Volumn 20, Issue 12, 1999, Pages 630-631

  Kim, Ilgweon ^a,b   Han, Sangyeon ^a   Han, Kwangseok ^a   Lee, Jongho ^c   Shin, Hyungcheol ^a  

^a Korea Advanced Institute of Science and Technology (KAIST)   (South Korea)

^b Hynix Semiconductor Inc   (South Korea)

^c School of Electrical Engineering   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

MOS CAPACITORS; NANOSTRUCTURED MATERIALS; SEMICONDUCTING SILICON; THERMAL EFFECTS; THRESHOLD VOLTAGE;

SINGLE ELECTRON EFFECTS;

SEMICONDUCTOR STORAGE;

EID: 0033350529     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/55.806109     Document Type: Article

References (5)

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2. S. Tiwari, F. Rana, H. I. Hanafi, A. Hartstein, and E. F. Crabbe, "A silicon nanocrystals based memory," Appl. Phys. Lett., vol. 68. no. 10, p. 1377, 1996.
3. I. G. Kim, H. S. Kim, J. H. Lee, and H. C. Shin, "Silicon nano-crystal memory with tunneling nitride," in Ext. Abst. SSDM, 1998, p. 170.
4. I. G. Kim, S. Y. Han, H. S. Kim, J. H. Lee, B. H. Choi, S. W. Hwang, D. Y. Ahn, and H. C. Shin, "Room temperature single electron effects in Si quantum dot memory with oxide-nitride tunneling dielectrics," in IEDM Tech. Dig., 1998, p. 111.
5. J. J. Welser, S. Tiwari, S. Rishton, K. Y. Lee, and Y. Lee, "Room temperature operation of a quantum-dot flash memory," IEEE Electron Device Lett., vol. 18, p. 278, June 1997.