Experimental and simulated results of room temperature single electron transistor formed by atomic force microscopy nano-oxidation process

Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers

Volumn 39, Issue 4 B, 2000, Pages 2334-2337

  Gotoh, Yoshitaka ^a   Matsumoto, Kazuhiko ^a   Bubanja, Vladimir ^a   Vazquez, Francisco ^a   Maeda, Tatsuro ^a   Harris, James S ^b  

^a ELECTROTECHNICAL LABORATORY   (Japan)

^b STANFORD UNIVERSITY   (United States)

Author keywords

Atomic force microscopy; Coulomb oscillation; Single electron transistor; Three dimensional simulation

Indexed keywords

ATOMIC FORCE MICROSCOPY; CAPACITANCE; COMPUTER SIMULATION; MATHEMATICAL MODELS; NANOTECHNOLOGY; OXIDATION; SEMICONDUCTOR DEVICE MANUFACTURE; SUBSTRATES; TEMPERATURE; TUNNEL JUNCTIONS;

COULOMB OSCILLATION; NANOOXIDATION PROCESS; SINGLE ELECTRON TRANSISTOR; THREE DIMENSIONAL SIMULATION;

TRANSISTORS;

EID: 0033720650     PISSN: 00214922     EISSN: None     Source Type: Journal    
DOI: 10.1143/jjap.39.2334     Document Type: Article

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