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Volumn 46, Issue 6 PART 1, 1999, Pages 1736-1743
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The effects of architecture and process on the hardness of programmable technologies
a,b a a a a b |
Author keywords
[No Author keywords available]
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Indexed keywords
FERROELECTRIC RANDOM ACCESS MEMORY;
HIGH ENERGY IONS;
PROGRAMMABLE MICROCIRCUITS;
SHALLOW TRENCH ISOLATION;
SINGLE EVENT LATCHUP;
FERROELECTRIC DEVICES;
HEAVY IONS;
INTEGRATED CIRCUIT LAYOUT;
RANDOM ACCESS STORAGE;
SEMICONDUCTOR DEVICE MANUFACTURE;
SEMICONDUCTOR DEVICES;
RADIATION HARDENING;
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EID: 0033331369
PISSN: 00189499
EISSN: None
Source Type: Journal
DOI: 10.1109/23.819147 Document Type: Article |
Times cited : (5)
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References (7)
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