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Volumn 3, Issue , 1999, Pages

Modeling, analysis, simulation and control of semiconductor manufacturing systems: a generalized stochastic colored timed Petri net approach

Author keywords

[No Author keywords available]

Indexed keywords

AUTOMATED GUIDED VEHICLE SYSTEMS; GENERALIZED STOCHASTIC COLORED TIMED PETRI NET; INTERBAY SYSTEM; INTRABAY SYSTEM;

EID: 0033308144     PISSN: 08843627     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (15)

References (6)
  • 1
    • 0032141060 scopus 로고    scopus 로고
    • Modeling, analysis, simulation, scheduling, and control of semiconductor manufacturing system: A petri net approach
    • MengChu Zhou and Mu Der Jeng, "Modeling, Analysis, Simulation, Scheduling, and Control of Semiconductor Manufacturing System: A petri Net Approach.", IEEE Tran, on Semiconductor Manufacturing, Vol. 11, pp. 333-357, 1998.
    • (1998) IEEE Tran, on Semiconductor Manufacturing , vol.11 , pp. 333-357
    • Zhou, M.C.1    Jeng, M.D.2
  • 3
    • 0032138965 scopus 로고    scopus 로고
    • Scheduling of SeMICONDUCTOR test facility via petri nets and hybrid heuristic search
    • Huanxin Henry Xiong and MengChu Zhou, "Scheduling of SeMICONDUCTOR Test Facility via Petri Nets and Hybrid Heuristic Search.", IEEE Tran, on Semiconductor Manufacturing, Vol. 11, pp. 384-393, 1998.
    • (1998) IEEE Tran, on Semiconductor Manufacturing , vol.11 , pp. 384-393
    • Xiong, H.H.1    Zhou, M.C.2
  • 4
    • 0032138964 scopus 로고    scopus 로고
    • Modeling and simulation of an electronic component manufacturing system using hybrid petri nets
    • Mohamed Allam and Hassane Alia, " Modeling and Simulation of an Electronic Component Manufacturing System Using Hybrid Petri Nets.", IEEE Tran, on Semiconductor Manufacturing, Vol. 11, pp. 374-383, 1998.
    • (1998) IEEE Tran, on Semiconductor Manufacturing , vol.11 , pp. 374-383
    • Allam, M.1    Alia, H.2
  • 5
    • 0032138478 scopus 로고    scopus 로고
    • Modeling and emulation of a gurnace in ic fab based on colored-timed petri net
    • Sheng-ya Lin and Han-Pang Hung, "Modeling and Emulation of a Gurnace in IC Fab Based on Colored-Timed Petri Net.", IEEE Tran, on Semiconductor Manufacturing, Vol. 11, pp. 410-420, 1998.
    • (1998) IEEE Tran, on Semiconductor Manufacturing , vol.11 , pp. 410-420
    • Lin, S.-Y.1    Hung, H.-P.2
  • 6
    • 0032137582 scopus 로고    scopus 로고
    • Modeling, qualitative analysis, simulation, and performance evaluation of the etching area in an IC wafer fabrication system using petri nets
    • Mu Der Jeng, Xiaolan Xie and Shih Wei Chou, "Modeling, Qualitative Analysis, Simulation, and Performance Evaluation of the Etching Area in an IC Wafer Fabrication System Using Petri Nets.", IEEE Tran, on Semiconductor Manufacturing, Vol. 11, pp. 358-373, 1998.
    • (1998) IEEE Tran, on Semiconductor Manufacturing , vol.11 , pp. 358-373
    • Jeng, M.D.1    Xie, X.2    Chou, S.W.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.