Compilation techniques for parallel systems

Parallel Computing

Volumn 25, Issue 13, 1999, Pages 1741-1783

  Gupta, Rajiv ^a   Pande, Santosh ^b   Psarris, Kleanthis ^c   Sarkar, Vivek ^d  

^a Gould Simpson Building   (United States)

^b University of Cincinnati   (United States)

^c Science Building   (United States)

^d IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER SYSTEMS PROGRAMMING; DATA STORAGE EQUIPMENT; OPTIMIZATION; PROGRAM COMPILERS; RESPONSE TIME (COMPUTER SYSTEMS);

INSTRUCTION LEVEL PARALLELISM (ILP); SHARED-MEMORY MULTIPROCESSORS (SMP);

PARALLEL PROCESSING SYSTEMS;

EID: 0033283421     PISSN: 01678191     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0167-8191(99)00086-1     Document Type: Article

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