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Volumn 18, Issue 3, 1996, Pages 235-253

Storage Assignment to Decrease Code Size

Author keywords

Algorithms; Code size; Compilation; D.3.4 Programming Languages : Processors compilers; Experimentation; Optimization; Storage assignment

Indexed keywords

ALGORITHMS; COMPUTATIONAL COMPLEXITY; COMPUTER ARCHITECTURE; COMPUTER PROGRAMMING LANGUAGES; DIGITAL ARITHMETIC; DIGITAL SIGNAL PROCESSING; HEURISTIC METHODS; OPTIMIZATION; PROGRAM COMPILERS; SHIFT REGISTERS;

EID: 0030149574     PISSN: 01640925     EISSN: None     Source Type: Journal    
DOI: 10.1145/229542.229543     Document Type: Article
Times cited : (66)

References (16)
  • 4
    • 0026817662 scopus 로고
    • Optimizing stack frame accesses for processors with restricted addressing modes
    • BARTLEY, D. H. 1992. Optimizing stack frame accesses for processors with restricted addressing modes. Softw. Pract. Exper. 22, 2 (Feb.), 101-110.
    • (1992) Softw. Pract. Exper. , vol.22 , Issue.2 FEB , pp. 101-110
    • Bartley, D.H.1
  • 8
    • 0019596071 scopus 로고
    • Trace scheduling: A technique for global microcode compaction
    • FISHER, J. A. 1981. Trace scheduling: A technique for global microcode compaction. IEEE Trans. Comput. C-30, 7, 478-490.
    • (1981) IEEE Trans. Comput. , vol.C-30 , Issue.7 , pp. 478-490
    • Fisher, J.A.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.