-
1
-
-
0024749138
-
-
pp. 1363-1371, 1989.
-
S. Nagasawa, Y. Wada, M. Hidaka, H. Tsuge, I. Ishida, and S. Tahara, "570-ps 13-mW Josephson 1-Kbit NDRO RAM," IEEE J. Solid-State Circuits, vol. 24, pp. 1363-1371, 1989.
-
Y. Wada, M. Hidaka, H. Tsuge, I. Ishida, and S. Tahara, "570-ps 13-mW Josephson 1-Kbit NDRO RAM," IEEE J. Solid-State Circuits, Vol. 24
-
-
Nagasawa, S.1
-
2
-
-
0024627831
-
-
pp. 783-788, 1989.
-
H. Suzuki, N. Fujimaki, H. Tamura, T. Imamura, and S. Hasuo, "A 4K Josephson memory," IEEE Trans, on Mag., vol. 25, pp. 783-788, 1989.
-
N. Fujimaki, H. Tamura, T. Imamura, and S. Hasuo, "A 4K Josephson Memory," IEEE Trans, on Mag., Vol. 25
-
-
Suzuki, H.1
-
3
-
-
0024716878
-
-
pp. 1034-1040, 1989.
-
I. Kurosawa, H. Nakagawa, S. Kousaka, M. Aoyagi, and S. Takada, "A 1-Kbit Josephson random access memory using variable threshold cells," IEEE J. Solid-State Circuits, vol. 24, pp. 1034-1040, 1989.
-
H. Nakagawa, S. Kousaka, M. Aoyagi, and S. Takada, "A 1-Kbit Josephson Random Access Memory Using Variable Threshold Cells," IEEE J. Solid-State Circuits, Vol. 24
-
-
Kurosawa, I.1
-
4
-
-
0026121382
-
-
pp. 2626-2633, 1991.
-
S. Tahara, I. Ishida, S. Nagasawa, M. Hidaka, H. Tsuge, and Y. Wada, "4-Kbit Josephson nondestructive read-out RAM operated at 580 psec and 6.7 mW," IEEE Trans. Mag., vol. 27, pp. 2626-2633, 1991.
-
I. Ishida, S. Nagasawa, M. Hidaka, H. Tsuge, and Y. Wada, "4-Kbit Josephson Nondestructive Read-out RAM Operated at 580 Psec and 6.7 MW," IEEE Trans. Mag., Vol. 27
-
-
Tahara, S.1
-
5
-
-
0027608145
-
-
Jun. 1993.
-
P.F. Yuh, "A 2-kbit superconducting memory chip," IEEE Trans, on Applied Superconductivity, vol. 3, no. 2, pp. 3013-3021, Jun. 1993.
-
"A 2-kbit Superconducting Memory Chip," IEEE Trans, on Applied Superconductivity, Vol. 3, No. 2, Pp. 3013-3021
-
-
Yuh, P.F.1
-
6
-
-
0029325870
-
-
Jun. 1995.
-
S. Nagasawa, Y. Hashimoto, H. Numata, and S. Tahara, "A 380-ps, 9.5-mW Josephson 4-Kbit RAM operated at a high bit yield," IEEE Trans, on Applied Superconductivity, vol. 5, no. 2, pp. 2447-2452, Jun. 1995.
-
Y. Hashimoto, H. Numata, and S. Tahara, "A 380-ps, 9.5-mW Josephson 4-Kbit RAM Operated at A High Bit Yield," IEEE Trans, on Applied Superconductivity, Vol. 5, No. 2, Pp. 2447-2452
-
-
Nagasawa, S.1
-
7
-
-
0031167081
-
-
June 1997.
-
P. Bunyk, A. Y. Kidiyarova-Shevchenko, and P. Litskevitch, "RSFQ microprocessor: new design approaches," IEEE Trans, on Applied Superconductivity, vol. 7, no. 2, pp. 2697-2704, June 1997.
-
A. Y. Kidiyarova-Shevchenko, and P. Litskevitch, "RSFQ Microprocessor: New Design Approaches," IEEE Trans, on Applied Superconductivity, Vol. 7, No. 2, Pp. 2697-2704
-
-
Bunyk, P.1
-
8
-
-
33747696626
-
-
pp. 290-292,1997.
-
S. Nagasawa, H. Numata, Y. Hashimoto, and S. Tahara, "High-frequency clock operation of Josephson RAMs," ISEC'97 Extended s, D31, pp. 290-292,1997.
-
H. Numata, Y. Hashimoto, and S. Tahara, "High-frequency Clock Operation of Josephson RAMs," ISEC'97 Extended S, D31
-
-
Nagasawa, S.1
-
9
-
-
0019021066
-
-
May 1980.
-
P.C. Arnett and D. J. Herreil, "Power design for gigabit Josephson logic system," IEEE Trans, on Microwave Theory and Techniques, vol. MTT28, pp. 500-508, May 1980.
-
And D. J. Herreil, "Power Design for Gigabit Josephson Logic System," IEEE Trans, on Microwave Theory and Techniques, Vol. MTT28, Pp. 500-508
-
-
Arnett, P.C.1
-
10
-
-
33747709556
-
-
pp. 192-194, 1995.
-
S. Nagasawa, H. Numata, C. Kato, and S. Tahara, "Evaluation of trapped magnetic flux for Josephson 4-Kbit RAMs," ISEC'95 Extended s, 7-3, pp. 192-194, 1995.
-
H. Numata, C. Kato, and S. Tahara, "Evaluation of Trapped Magnetic Flux for Josephson 4-Kbit RAMs," ISEC'95 Extended S, 7-3
-
-
Nagasawa, S.1
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