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Volumn 5, Issue 2, 1995, Pages 2447-2452

A 380 ps, 9.5 mW Josephson 4-Kbit RAM Operated at a High Bit Yield

Author keywords

[No Author keywords available]

Indexed keywords

FABRICATION; INSULATING MATERIALS; INTEGRATED CIRCUIT LAYOUT; JOSEPHSON JUNCTION DEVICES; MAGNETIC FIELDS; MOLYBDENUM; NETWORKS (CIRCUITS); NIOBIUM; RESISTORS; SILICA; SPUTTERING;

EID: 0029325870     PISSN: 10518223     EISSN: 15582515     Source Type: Journal    
DOI: 10.1109/77.403086     Document Type: Article
Times cited : (391)

References (13)
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    • P. F. Yuh, “A 2-Kbit superconducting memory chip,” IEEE Trans. Appl. Superconductivity,” vol. 3, no. 2, pp. 3013-3021, June 1993.
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    • Yuh, P.F.1
  • 5
    • 0026121382 scopus 로고
    • 4-Kbit Josephson nondestructive read-out RAM operated at 580 psec and 6.7 mW
    • Mar.
    • S. Tahara, I. Ishida, S. Nagasawa, M. Hidaka, H. Tsuge. and Y. Wada, “4-Kbit Josephson nondestructive read-out RAM operated at 580 psec and 6.7 mW.” IEEE Trans. Mag., vol. 27, no. 2, pp. 2626-2633, Mar. 1991.
    • (1991) IEEE Trans. Mag. , vol.27 , Issue.2 , pp. 2626-2633
    • Tahara, S.1    Ishida, I.2    Nagasawa, S.3    Hidaka, M.4    Tsuge, H.5    Wada, Y.6
  • 6
    • 36549094420 scopus 로고
    • Experimental vortex transitional nondestructive read-out Josephson memory cell
    • Jan.
    • S. Tahara, I. Ishida, Y. Ajisawa, and Y. Wada, “Experimental vortex transitional nondestructive read-out Josephson memory cell,” J. Appl. Phys., vol. 65, no. 2, pp. 851-856, Jan. 1989.
    • (1989) J. Appl. Phys. , vol.65 , Issue.2 , pp. 851-856
    • Tahara, S.1    Ishida, I.2    Ajisawa, Y.3    Wada, Y.4
  • 9
    • 0026117593 scopus 로고
    • A fabrication process for a 580 ps 4Kbit Josephson non-destructive read -out RAM
    • May
    • I. Ishida, S. Tahara, M. Hidaka, S. Nagasawa, S. Tsuchida, and Y. Wada, “A fabrication process for a 580 ps 4Kbit Josephson non-destructive read -out RAM,” IEEE Trans. Mag., vol. 27, no. 2, pp. 3113-3116, May. 1991.
    • (1991) IEEE Trans. Mag. , vol.27 , Issue.2 , pp. 3113-3116
    • Ishida, I.1    Tahara, S.2    Hidaka, M.3    Nagasawa, S.4    Tsuchida, S.5    Wada, Y.6
  • 10
    • 0002630101 scopus 로고    scopus 로고
    • Fabrication process for submicron Josephson junctions, Extended abstracts of ISEC’93
    • H. Numata, S. Nagasawa, and S. Tahara, “Fabrication process for submicron Josephson junctions, Extended abstracts of ISEC’93. pp. 280-281.
    • Numata, H.1    Nagasawa, S.2    Tahara, S.3
  • 11
    • 0028480584 scopus 로고
    • A Resistor coupled Josephson polarity-convertible driver
    • Aug.
    • S. Nagasawa. S. Tahara, H. Numata, Y. Hashimoto. and S. Tsuchida, “A Resistor coupled Josephson polarity-convertible driver,” IEICE Trans. Electron., vol E77-C, no. 8, pp. 1176-1180, Aug. 1994.
    • (1994) IEICE Trans. Electron , vol.E77-C , Issue.8 , pp. 1176-1180
    • Nagasawa, S.1    Tahara, S.2    Numata, H.3    Hashimoto, Y.4    Tsuchida, S.5
  • 12
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    • Functional testing of semiconductor random access memories
    • M. S. Abadir and H. K. Reghbati, “Functional testing of semiconductor random access memories.” ACM Computing Surveys, vol. 15, no. 3, pp. 175-198, Sep. 1983.
    • (1983) ACM Computing Surveys , vol.15 , Issue.3 , pp. 175-198
    • Abadir, M.S.1    Reghbati, H.K.2
  • 13
    • 0020126435 scopus 로고
    • Moat-guarded Josephson SQUIDs
    • May
    • S. Bcrmon and T. Gheewala, “Moat-guarded Josephson SQUIDs,” IEEE Trans. Mag., vol. 19, no. 3, pp. 1160-1164, May 1983.
    • (1983) IEEE Trans. Mag. , vol.19 , Issue.3 , pp. 1160-1164
    • Bcrmon, S.1    Gheewala, T.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.