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Volumn 24, Issue 5, 1989, Pages 1363-1371

570-ps 13-mW Josephson 1-kbit NDRO RAM

Author keywords

[No Author keywords available]

Indexed keywords

DATA STORAGE, DIGITAL--RANDOM ACCESS; LOGIC CIRCUITS; SUPERCONDUCTING DEVICES--JOSEPHSON JUNCTIONS;

EID: 0024749138     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/JSSC.1989.572615     Document Type: Article
Times cited : (31)

References (14)
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  • 2
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  • 3
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    • Mar.
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    • (1980) IBM J. Res. Develop. , vol.24 , Issue.2 , pp. 143-154
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  • 4
    • 0020747870 scopus 로고
    • An experimental nanosecond Josephson IK RAM using 5-μm Pb-alloy technology
    • May
    • M. Yamamoto et al., “An experimental nanosecond Josephson IK RAM using 5-μm Pb-alloy technology,” IEEE Electron Device Lett., vol. EDL-4, no. 5, pp. 150–152, May 1983.
    • (1983) IEEE Electron Device Lett. , vol.EDL-4 , Issue.5 , pp. 150-152
    • Yamamoto, M.1
  • 5
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    • Aug.
    • Y. Wada, M. Hidaka, S. Nagasawa, and I. Ishida, “AC- and DC-powered subnanosecond 1-kbit Josephson cache memory design,” IEEE J. Solid-State Circuits, vol. 23, no. 4, pp. 923–932, Aug. 1988.
    • (1988) IEEE J. Solid-State Circuits , vol.23 , Issue.4 , pp. 923-932
    • Wada, Y.1    Hidaka, M.2    Nagasawa, S.3    Ishida, I.4
  • 6
    • 0023436118 scopus 로고
    • 280-ps 6-bit RCJL decoder using high-drivability and unit circuit for a 1-kbit Josephson cache memory
    • Oct.
    • Y. Wada, S. Nagasawa, and I. Ishida, “280-ps 6-bit RCJL decoder using high-drivability and unit circuit for a 1-kbit Josephson cache memory,” IEEE J. Solid-State Circuits, vol. SC-22, no. 5, pp. 892–898, Oct. 1987.
    • (1987) IEEE J. Solid-State Circuits , vol.SC-22 , Issue.5 , pp. 892-898
    • Wada, Y.1    Nagasawa, S.2    Ishida, I.3
  • 7
    • 0022077548 scopus 로고
    • An AC-powered experimental memory circuit with a resistively loaded sense circuit
    • June
    • M. Hidaka, J. Sone, I. Ishida, and Y. Wada, “An AC-powered experimental memory circuit with a resistively loaded sense circuit,” IEEE Electron Device Lett., vol. EDL-6, no. 6, pp. 267–269, June 1985.
    • (1985) IEEE Electron Device Lett. , vol.EDL-6 , Issue.6 , pp. 267-269
    • Hidaka, M.1    Sone, J.2    Ishida, I.3    Wada, Y.4
  • 8
    • 0024627888 scopus 로고
    • Nb multilayer planarization technology for a subnanosecond Josephson IK-bit RAM
    • Mar.
    • S. Nagasawa et al., “Nb multilayer planarization technology for a subnanosecond Josephson IK-bit RAM,” IEEE Trans. Magn., vol. 25, no. 2, pp. 777–782, Mar. 1989.
    • (1989) IEEE Trans. Magn. , vol.25 , Issue.2 , pp. 777-782
    • Nagasawa, S.1
  • 9
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    • Resister coupled Josephson logic
    • Apr.
    • J. Sone, T. Yoshida, and H. Abe, “Resister coupled Josephson logic,” Appl. Phys. Lett., vol. 40, no. 8, pp. 741–744, Apr. 1982.
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    • Sone, J.1    Yoshida, T.2    Abe, H.3
  • 10
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    • A uniform polymer coating technique for an etch back planarization process using low molecular polymers
    • H. Gokan, M.Mukainaru, and N. Endo, “A uniform polymer coating technique for an etch back planarization process using low molecular polymers,” J. Electrochem. Soc., vol. 135, pp. 1019–1020, 1988.
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    • Gokan, H.1    Mukainaru, M.2    Endo, N.3
  • 11
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    • Aug.
    • S. Nagasawa, H. Tsuge, and Y. Wada, “Planarization technology for Josephson integrated circuits,” IEEE Electron Device Lett., vol. 9, no, 8, pp. 414–416, Aug. 1988.
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    • Nagasawa, S.1    Tsuge, H.2    Wada, Y.3
  • 13
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    • M. Hidaka, H. Tsuge, and Y. Wada, “Thermal stability of Nb/A10 x/Nb Josephson junction,” Advances Cryogenic Eng. Mater., vol. ‘34, pp. 765–772, 1988.
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    • Hidaka, M.1    Tsuge, H.2    Wada, Y.3
  • 14
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.