Plasma processing damage in etching and deposition

IBM Journal of Research and Development

Volumn 43, Issue 1-2, 1999, Pages 103-106

  Fonash, S J ^a  

^a NONE

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUIT LAYOUT; MAGNETIC FLUX; MICROELECTRONICS; PLASMA ENHANCED CHEMICAL VAPOR DEPOSITION; PLASMA ETCHING;

PLASMA PROCESSING DAMAGES; TIME-CHANGING MAGNETIC FIELDS;

PLASMA APPLICATIONS;

EID: 0032685931     PISSN: 00188646     EISSN: None     Source Type: Journal    
DOI: 10.1147/rd.431.0103     Document Type: Article

References (14)

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