Characterization and parameterized generation of synthetic combinational benchmark circuits

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 17, Issue 10, 1998, Pages 985-996

  Hutton, Michael D ^a,b   Rose, Jonathan ^a,b   Grossman, J P ^a,b   Cornell, Derek G ^a,b  

^a ALTERA CORPORATION   (United States)

^b UNIVERSITY OF TORONTO   (Canada)

Author keywords

Algorithms; Design automation; Field programmable gate arrays

Indexed keywords

ALGORITHMS; COMBINATORIAL CIRCUITS; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT TESTING;

LASER-PROGRAMMED GATE ARRAYS; MASK-PROGRAMMED GATE ARRAYS; SYNTHETIC COMBINATIONAL BENCHMARK CIRCUITS;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 0032182384     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.728919     Document Type: Article

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